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參數資料
| 型號： | SN74ALVCH16334DGV |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 16-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS |
| 中文描述： | 16位通用總線驅動器，三態輸出 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 134K |
| 代理商： | SN74ALVCH16334DGV |
SN74ALVCH16334
16-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
SCES090H – OCTOBER 1996 – REVISED FEBRUARY 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
Designed to Comply With JEDEC 168-Pin
and 200-Pin SDRAM Buffered DIMM
Specification
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink
Small-Outline (DGG), and Thin Very
Small-Outline (DGV) Packages
description
This 16-bit universal bus driver is designed for
1.65-V to 3.6-V V
CC
operation.
Data flow from A to Y is controlled by the
output-enable (OE) input. The device operates in
the transparent mode when the latch-enable (LE)
input is low. When LE is high, the A data is latched
if the clock (CLK) input is held at a high or low logic
level. If LE is high, the A data is stored in the
latch/flip-flop on the low-to-high transition of CLK.
When OE is high, the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16334 is characterized for operation from –40
°
C to 85
°
C.
Copyright
1999, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
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OE
Y1
Y2
GND
Y3
Y4
V
CC
Y5
Y6
GND
Y7
Y8
Y9
Y10
GND
Y11
Y12
V
CC
Y13
Y14
GND
Y15
Y16
NC
CLK
A1
A2
GND
A3
A4
V
CC
A5
A6
GND
A7
A8
A9
A10
GND
A11
A12
V
CC
A13
A14
GND
A15
A16
LE
NC – No internal connection
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74ALVCH16334DGVR | 功能描述:總線收發器 16bit Univ Bus RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH16334DL | 功能描述:通用總線函數 16bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH16334DLR | 功能描述:總線收發器 16B Uni Bus Driver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH16344DGGR | 功能描述:緩沖器和線路驅動器 1-4bit Address RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74ALVCH16344DL | 功能描述:緩沖器和線路驅動器 1Bit To 4Bit Add Drv With 3-State Outputs RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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