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參數資料
| 型號： | SN74ALVCH16600DLR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發器 |
| 英文描述： | ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | GREEN, PLASTIC, SSOP-56 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 320K |
| 代理商： | SN74ALVCH16600DLR |
www.ti.com
FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG OR DL PACKAGE
(TOP VIEW)
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OEAB
LEAB
A1
GND
A2
A3
VCC
A4
A5
A6
GND
A7
A8
A9
A10
A11
A12
GND
A13
A14
A15
VCC
A16
A17
GND
A18
OEBA
LEBA
CLKENAB
CLKAB
B1
GND
B2
B3
VCC
B4
B5
B6
GND
B7
B8
B9
B10
B11
B12
GND
B13
B14
B15
VCC
B16
B17
GND
B18
CLKBA
CLKENBA
SN74ALVCH16600
18-BIT UNIVERSAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES030G – JULY 1995 – REVISED JULY 2004
Member of the Texas Instruments Widebus
Family
UBT Transceiver Combines D-Type Latches
and D-Type Flip-Flops for Operation in
Transparent, Latched, Clocked, or
Clock-Enable Mode
Operates From 1.65-V to 3.6-V VCC
Max tpd of 4 ns at 3.3-V VCC
±24-mA Output Drive at 3.3-V V
CC
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
This 18-bit universal bus transceiver is designed for
1.65-V to 3.6-V VCC operation.
The SN74ALVCH16600 combines D-type latches and
D-type flip-flops to allow data flow in transparent,
latched, and clocked modes.
Data
flow
in
each
direction
is
controlled
by
output-enable
(OEAB
and
OEBA),
latch-enable
(LEAB and LEBA), and clock (CLKAB and CLKBA)
inputs.
The
clock
can
be
controlled
by
the
clock-enable (CLKENAB and CLKENBA) inputs. For
A-to-B
data
flow,
the
device
operates
in
the
transparent mode when LEAB is high. When LEAB is
low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the
latch/flip-flop on the high-to-low transition of CLKAB. When OEAB is low, the outputs are active. When OEAB is
high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B, but uses OEBA,
LEBA, CLKBA, and CLKENBA.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Tube
SN74ALVCH16600DL
SSOP - DL
ALVCH16600
-40 to 85
°C
Tape and reel
SN74ALVCH16600DLR
TSSOP - DGG
Tape and reel
SN74ALVCH16600DGGR
ALVCH16600
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, UBT are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 1995–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74ALVCH16601DGGR | 功能描述:通用總線函數 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH16601DGVR | 功能描述:通用總線函數 18-Bit Univ Bus Trncvr W/3-St Otpt RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH16601DL | 功能描述:通用總線函數 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH16601DLR | 功能描述:通用總線函數 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數量:1 開啟電阻（最大值）: 傳播延遲時間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVCH16646 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
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