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參數資料
| 型號： | SN74AS373DWR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發器 |
| 英文描述： | AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | GREEN, PLASTIC, SOIC-20 |
| 文件頁數： | 1/20頁 |
| 文件大?。?/td> | 740K |
| 代理商： | SN74AS373DWR |
SN54ALS373A, SN54AS373, SN74ALS373A, SN74AS373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDAS083C – APRIL 1982 – REVISED MARCH 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Eight Latches in a Single Package
D 3-State Bus-Driving True Outputs
D Full Parallel Access for Loading
D Buffered Control Inputs
D pnp Inputs Reduce dc Loading on Data
Lines
description
These octal transparent D-type latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads.
They
are
particularly
suitable
for
implementing
buffer
registers,
I/O
ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
interface or pullup components.
OE does not affect internal operations of the
latches. Old data can be retained or new data can
be entered while the outputs are off.
Copyright
2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
SN54ALS373A, ...J OR W PACKAGE
SN54AS373 ...J PACKAGE
SN74ALS373A, SN74AS373 ...DW, N, OR NS PACKAGE
(TOP VIEW)
32 1 20 19
910 11 12 13
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5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
SN54ALS373A, SN54AS373 . . . FK PACKAGE
(TOP VIEW)
1D
1Q
OE
5Q
5D
8Q
4Q
GND
LE
V
CC
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74AS373DWRE4 | 功能描述:閉鎖 Octal Dtype Transparent Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SN74AS373DWRG4 | 功能描述:閉鎖 Octal Dtype Transparent Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SN74AS373N | 功能描述:閉鎖 Octal Dtype Transparent Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SN74AS373N3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74AS373NE4 | 功能描述:閉鎖 Octal Dtype Transparent Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
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