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參數資料
| 型號： | SN74AS652DWE4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發器 |
| 英文描述： | AS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | GREEN, PLASTIC, SOIC-24 |
| 文件頁數： | 1/33頁 |
| 文件大小： | 747K |
| 代理商： | SN74AS652DWE4 |
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SN54ALS652, SN54ALS653, SN54AS651, SN54AS652
SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Bus Transceivers/Registers
D Independent Registers and Enables for A
and B Buses
D Multiplexed Real-Time and Stored Data
D Choice of True or Inverting Data Paths
D Choice of 3-State or Open-Collector
Outputs to A Bus
DEVICE
A OUTPUT
B OUTPUT
LOGIC
SN74ALS651A,
’AS651
3-State
Inverting
SN54ALS652,
SN74ALS652A,
’AS652
3-State
True
’ALS653
Open Collector
3-State
Inverting
SN74ALS654
Open Collector
3-State
True
description
These devices consist of bus-transceiver circuits,
D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
data bus or from the internal storage registers.
Output-enable (OEAB and OEBA) inputs are
provided to control the transceiver functions.
Select-control (SAB and SBA) inputs are provided
to select real-time or stored data transfer. The
circuitry used for select control eliminates the
typical decoding glitch that occurs in a multiplexer
during the transition between stored and real-time
data. A low input level selects real-time data, and
a high input level selects stored data. Figure 1
illustrates the four fundamental bus-management
functions that can be performed with the octal bus
transceivers and registers
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at
the appropriate clock (CLKAB or CLKBA) terminals, regardless of the select- or output-control terminals. When
SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type
flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input.
When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains
at its last state.
The -1 versions of the SN74ALS651A and SN74ALS652A are identical to the standard versions except that the
recommended maximum IOL for the -1 versions is increased to 48 mA. There are no -1 versions of the
SN54ALS652, SN54ALS653, SN74ALS653, and SN74ALS654.
Copyright
2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NC – No internal connection
SN54ALS’, SN54AS’ . . . FK PACKAGE
(TOP VIEW)
SN54ALS’, SN54AS’ . . . JT PACKAGE
SN74ALS’, SN74AS’ . . . DW OR NT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLKAB
SAB
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
CLKBA
SBA
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
32 1
13 14
5
6
7
8
9
10
11
OEBA
B1
B2
NC
B3
B4
B5
A1
A2
A3
NC
A4
A5
A6
4
15 16 17 18
A8
GND
NC
B8
B7
B6
OEAB
SAB
CLKAB
NC
28 27 26
25
24
23
22
21
20
19
12
A7
CLKBA
SAB
CC
V
相關PDF資料 |
PDF描述 |
|---|---|
| SN74ALS652A-1DWRE4 | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| SN74ALS653FN3 | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PQCC28 |
| SN54ALS651JT | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24 |
| SN74ALS654-1FN3 | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PQCC28 |
| SN74ALS652-1DWR | ALS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74AS652DWG4 | 功能描述:總線收發器 Octal Bus Trancvrs Regstrs RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74AS652DWR | 功能描述:總線收發器 Octal Bus Trncvr/Reg W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74AS652DWRE4 | 功能描述:總線收發器 Octal Bus Trncvr/Reg W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74AS652DWRG4 | 功能描述:總線收發器 Octal Bus Trancvrs Regstrs RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74AS652FN | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
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