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參數資料
| 型號： | SN74AUC2G34YZAR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 門電路 |
| 英文描述： | AUC SERIES, DUAL 1-INPUT NON-INVERT GATE, PBGA6 |
| 封裝： | DSBGA-6 |
| 文件頁數： | 1/18頁 |
| 文件大小： | 614K |
| 代理商： | SN74AUC2G34YZAR |
www.ti.com
FEATURES
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
6
5
4
1A
GND
2A
1Y
VCC
2Y
3
2
1
4
5
6
2A
GND
1A
2Y
VCC
1Y
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DESCRIPTION/ORDERING INFORMATION
SN74AUC2G34
DUAL BUFFER GATE
SCES514 – NOVEMBER 2003 – REVISED APRIL 2005
Available in the Texas Instruments
NanoStar and NanoFree Packages
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max tpd of 1.6 ns at 1.8 V
Low Power Consumption, 10
A at 1.8 V
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
This dual buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC
operation.
The SN74AUC2G34 performs the Boolean function Y = A in positive logic.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar – WCSP (DSBGA)
SN74AUC2G34YEPR
0.23-mm Large Bump – YEP
Tape and reel
_ _ _U9_
NanoFree – WCSP (DSBGA)
SN74AUC2G34YZPR
–40°C to 85°C
0.23-mm Large Bump – YZP (Pb-free)
SOT (SOT-23) – DBV
Tape and reel
SN74AUC2G34DBVR
U34_
SOT (SC-70) – DCK
Tape and reel
SN74AUC2G34DCKR
U9_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 2003–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74AUC2G34YZPR | 功能描述:緩沖器和線路驅動器 DUAL BUFFER GATE RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74AUC2G34YZTR | 功能描述:緩沖器和線路驅動器 Dual Bufr Gate RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74AUC2G53DCTR | 功能描述:模擬開關 IC Single Pole Double- Throw Analog Sw RoHS:否 制造商:Texas Instruments 開關數量:2 開關配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| SN74AUC2G53DCTRE4 | 功能描述:模擬開關 IC SNGL Pole Doubl Thrw Analog SWCH RoHS:否 制造商:Texas Instruments 開關數量:2 開關配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
| SN74AUC2G53DCTRG4 | 功能描述:模擬開關 IC SPDT Ana Switch or 2:1 Ana Mux/Demux RoHS:否 制造商:Texas Instruments 開關數量:2 開關配置:SPDT 開啟電阻（最大值）:0.1 Ohms 切換電壓（最大）: 開啟時間（最大值）: 關閉時間（最大值）: 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-16 |
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