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參數資料
| 型號： | SN74AUP1G240YEPR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發器 |
| 英文描述： | AUP/ULP/V SERIES, 1-BIT DRIVER, INVERTED OUTPUT, BGA5 |
| 封裝： | DSBGA-5 |
| 文件頁數： | 1/17頁 |
| 文件大小： | 540K |
| 代理商： | SN74AUP1G240YEPR |
www.ti.com
FEATURES
DBVPACKAGE
(TOP VIEW)
Seemechanicaldrawingsfordimensions.
5
1
V
CC
OE
2
A
3
4
GND
Y
DCKPACKAGE
(TOP VIEW)
2
A
3
4
GND
V
CC
5
OE
Y
1
YEP OR YZP PACKAGE
(BOTTOMVIEW)
2
A
V
CC
1 5
OE
GND
4
3
Y
DESCRIPTION/ORDERING INFORMATION
AUP
LVC
AUP
LVC
Static-PowerConsumption
( A)
m
Dynamic-PowerConsumption
(pF)
Single,dual,andtriplegates.
3.3-V
Logic
3.3-V
Logic
0%
20%
40%
60%
80%
100%
0%
20%
40%
60%
80%
100%
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
0
5
10
15
20
25
30
35
40
45
Time-ns
V
o
lt
a
g
e
-
V
AUP1G08dataatCL =15pF.
Output
Input
SwitchingCharacteristics
at25MHz
LOW-POWER SINGLE BUFFER/DRIVER
WITH 3-STATE OUTPUT
SCES627A – MARCH 2005 – REVISED AUGUST 2006
Available in the Texas Instruments
Wide Operating V
CC Range of 0.8 V to 3.6 V
NanoStar and NanoFree Packages
Optimized for 3.3-V Operation
Low Static-Power Consumption
3.6-V I/O Tolerant to Support Mixed-Mode
– I
CC = 0.9 A Max
Signal Operation
Low Dynamic-Power Consumption
t
pd = 4.1 ns Max at 3.3 V
– C
pd = 4.2 pF at 3.3 V Typ
Suitable for Point-to-Point Applications
Low Input Capacitance
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
– C
I = 1.5 pF Typ
ESD Performance Tested Per JESD 22
Low Noise – Overshoot and Undershoot
<10% of V
CC
– 2000-V Human-Body Model
(A114-B, Class II)
Input-Disable Feature Allows Floating Input
Conditions
– 200-V Machine Model (A115-A)
I
off Supports Partial Power-Down-Mode
– 1000-V Charged-Device Model (C101)
Operation
ESD Protection Exceeds
±5000 V With
Input Hysteresis Allows Slow Input Transition
Human-Body Model
and Better Switching Noise Immunity at the
Input
The AUP family is TI's premier solution to the industry's low power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figure 1 and Figure 2).
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 2005–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74AUP1G240YFPR | 功能描述:緩沖器和線路驅動器 Low-Pwr Sgl Bfr/ Driver RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74AUP1G240YZPR | 功能描述:緩沖器和線路驅動器 LoPwrSngl Bffr/Drvr RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74AUP1G32DBVR | 功能描述:邏輯門 Lo Pwr Sngl 2 Inpt Pos OR Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G32DBVRE4 | 功能描述:邏輯門 Lo PWR SNGL 2Input Pos OR Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUP1G32DBVRG4 | 功能描述:邏輯門 Lo-Pwr Sgl 2-Input Pos-OR Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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