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參數(shù)資料
型號: SN74BCT29854DWRE4
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: BCT/FBT SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO24
封裝: GREEN, PLASTIC, SOIC-24
文件頁數(shù): 1/12頁
文件大小: 416K
代理商: SN74BCT29854DWRE4
DW OR NT PACKAGE
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OEA
A1
A2
A3
A4
A5
A6
A7
A8
ERR
CLR
GND
VCC
B1
B2
B3
B4
B5
B6
B7
B8
PARITY
OEB
LE
SN74BCT29854
8BIT TO 9BIT PARITY BUS TRANSCEIVER
SCBS257 SEPTEMBER 1987 REVISED NOVEMBER 1993
Copyright
1993, Texas Instruments Incorporated
21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
BiCMOS Process With TTL Inputs and
Outputs
State-of-the-Art BiCMOS Design
Significantly Reduces Standby Current
Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
Functionally Equivalent to AMD Am29854
High-Speed Bus Transceiver With Parity
Generator / Checker
Parity-Error Flag With Open-Collector
Output
Latch for Storage of the Parity-Error Flag
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (NT)
description
The SN74BCT29854 is an 8-bit to 9-bit parity transceiver designed for asynchronous communication between
data buses. When data is transmitted from the A to B bus, a parity bit is generated. When data is transmitted
from the B to A bus with its corresponding parity bit, the parity-error (ERR) output will indicate whether or not
an error in the B data has occurred. The output-enable (OEA, OEB) inputs can be used to disable the device
so that the buses are effectively isolated.
A 9-bit parity generator/ checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports
with an open-collector parity-error (ERR) flag. ERR can be either passed, sampled, stored, or cleared from the
latch using the latch-enable (LE) and clear (CLR) control inputs. When both OEA and OEB are low, data is
transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition
which gives the designer more system diagnostic capability. The SN74BCT29854 provides inverting logic.
The SN74BCT29854 is characterized for operation from 0
°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUT AND I/O
OEB
OEA
CLR
LE
Ai
∑ of H’s
Bi
∑ of L’s
A
B
PARITY
ERR
FUNCTION
L
H
X
Odd
Even
NA
A
H
L
NA
A data to B bus and generate parity
H
L
X
L
NA
Odd
Even
B
NA
H
L
B data to A bus and check parity
H
L
H
NA
X
NA
N1
Store error flag
X
L
H
X
NA
H
Clear error-flag register
H
L
X
H
L
X
L Odd
H Even
X
Z
NC
H
L
H
Isolation§
L
X
Odd
Even
NA
A
L
H
NA
A data to B bus and generate inverted
parity
NA = not applicable, NC = no change, X = don’t care
Summation of low-level inputs includes PARITY along with Bi inputs.
Output states shown assume the ERR output was previously high.
§ In this mode, the ERR output, when enabled, shows noninverted parity of the A bus.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74BCT29854DWRG4 功能描述:總線收發(fā)器 8B To 9B Parity Transceivers RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74BCT29854NT 功能描述:總線收發(fā)器 8-Bit To 9-Bit Parity Transceivers RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74BCT29854NTE4 功能描述:總線收發(fā)器 8-Bit To 9-Bit Parity Transceivers RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74BCT29861BNT 制造商:Rochester Electronics LLC 功能描述:- Bulk
SN74BCT29862BDWR 制造商:Rochester Electronics LLC 功能描述:- Bulk
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