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參數(shù)資料
| 型號(hào)： | SN74CBTLV3857DBQR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | CBTLV/3B SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | PLASTIC, QSOP-24 |
| 文件頁(yè)數(shù)： | 1/14頁(yè) |
| 文件大小： | 486K |
| 代理商： | SN74CBTLV3857DBQR |
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SN74CBTLV3857
LOW VOLTAGE 10BIT FET BUS SWITCH
WITH INTERNAL PULLDOWN RESISTORS
SCDS085E OCTOBER 1998 REVISED OCTOBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Enable Signal Is SSTL_2 Compatible
D Flow-Through Architecture Optimizes PCB
Layout
D Designed for Use With 200 Mbit/s Double
Data-Rate (DDR) SDRAM Applications
D Switch On-State Resistance Is Designed to
Eliminate Series Resistor to DDR SDRAM
D Internal 10-k Pulldown Resistors to
Ground on B Port
D Internal 50-k Pullup Resistor on
Output-Enable Input
D Rail-to-Rail Switching on Data I/O Ports
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
description/ordering information
This 10-bit FET bus switch is designed for 3-V to 3.6-V VCC operation and SSTL_2 output-enable (OE) input
levels.
When OE is low, the 10-bit bus switch is on, and port A is connected to port B. When OE is high, the switch is
open, and the high-impedance state exists between the two ports. There are 10-k
pulldown resistors to ground
on the B port.
The FET switch on-state resistance is designed to replace the series terminating resistor in the SSTL_2
data path.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP DBQ
Tape and reel
SN74CBTLV3857DBQR
CL857
SOIC DW
Tube
SN74CBTLV3857DW
CBTLV3857
40
°C to 85°C
SOIC DW
Tape and reel
SN74CBTLV3857DWR
CBTLV3857
40 C to 85 C
TSSOP PW
Tape and reel
SN74CBTLV3857PWR
CL857
TVSOP DGV
Tape and reel
SN74CBTLV3857DGVR
CL857
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
Copyright
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
VREF
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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| SN74CBTLV3857DGVR | 功能描述:數(shù)字總線開關(guān) IC LV 10bit FET w/Pldwn RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:24 傳播延遲時(shí)間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
| SN74CBTLV3857DW | 功能描述:數(shù)字總線開關(guān) IC LV 10bit FET w/Pldwn RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:24 傳播延遲時(shí)間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
| SN74CBTLV3857DWE4 | 功能描述:數(shù)字總線開關(guān) IC 16-Bit Edg-Trig D-Ty F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:24 傳播延遲時(shí)間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
| SN74CBTLV3857DWG4 | 功能描述:數(shù)字總線開關(guān) IC LO VLTG 10B FETBus Switch RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:24 傳播延遲時(shí)間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
| SN74CBTLV3857DWR | 功能描述:數(shù)字總線開關(guān) IC LV 10bit FET w/Pldwn RoHS:否 制造商:Texas Instruments 開關(guān)數(shù)量:24 傳播延遲時(shí)間:0.25 ns 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-56 封裝:Reel |
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