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參數資料
| 型號： | SN74LS114D |
| 廠商： | Motorola, Inc. |
| 英文描述： | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| 中文描述： | 雙JK負邊沿觸發器 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 146K |
| 代理商： | SN74LS114D |
5-193
FAST AND LS TTL DATA
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54/74LS114A offers common clock and common clear inputs and
individual J, K, and set inputs. These monolithic dual flip-flops are designed
so that when the clock goes HIGH, the inputs are enabled and data will be
accepted. The logic level of the J and K inputs may be allowed to change when
the clock pulse is HIGH and the bistable will perform according to the truth
table as long as minimum set-up times are observed. Input data is transferred
to the outputs on the negative-going edge of the clock pulse.
LOGIC DIAGRAM
(Each Flip-Flop)
"
MODE SELECT — TRUTH TABLE
OPERATING MODE
INPUTS
OUTPUTS
SD
L
H
L
H
H
H
H
CD
H
L
L
H
H
H
H
J
K
Q
Q
Set
Reset (Clear)
*Undetermined
Toggle
Load “0” (Reset)
Load “1” (Set)
Hold
X
X
X
h
l
h
l
X
X
X
h
h
l
l
H
L
H
q
L
H
q
L
H
H
q
H
L
q
* Both outputs will be HIGH while both SD and CD are LOW, but the output states
are unpredictable if SD and CD go HIGH simultaneously.
H, h = HIGH Voltage Level
L, I = LOW Voltage Level
X = Don’t Care
l, h (q) = Lower case letters indicate the state of the referenced input (or output)
l, h (q) =
one set-up time prior to the HIGH to LOW clock transition.
SN54/74LS114A
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
LOGIC SYMBOL
!
J SUFFIX
CERAMIC
CASE 632-08
N SUFFIX
PLASTIC
CASE 646-06
14
1
14
1
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
14
1
D SUFFIX
SOIC
CASE 751A-02
相關PDF資料 |
PDF描述 |
|---|---|
| SN74LS114N | Optical Receiver for Industrial Applications with SMA Port,, Standard Power, RoHS Compliant |
| SN54LS126J | CAP CERAMIC 4.7UF 10V Y5V 0805 |
| SN54LS125 | QUAD 3-STATE BUFFERS |
| SN54LS125A | QUAD 3-STATE BUFFERS |
| SN54LS125J | QUAD 3-STATE BUFFERS |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74LS11D | 功能描述:邏輯門 Triple 3-Input Positive-AND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LS11D | 制造商:Texas Instruments 功能描述:Gate / Inverter Logic IC |
| SN74LS11DE4 | 功能描述:邏輯門 Triple 3-Input Positive-AND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LS11DG4 | 功能描述:邏輯門 Triple 3-Input Positive-AND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LS11DR | 功能描述:邏輯門 Triple 3-Input Positive-AND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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