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參數資料
| 型號： | SN74LS175D |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | High Gain, High Linearity Active Bias Low Noise Amplifier |
| 中文描述： | LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數： | 1/5頁 |
| 文件大?。?/td> | 171K |
| 代理商： | SN74LS175D |
5-327
FAST AND LS TTL DATA
QUAD D FLIP-FLOP
The LSTTL/MSI SN54/74LS175 is a high speed Quad D Flip-Flop. The
device is useful for general flip-flop requirements where clock and clear inputs
are common. The information on the D inputs is stored during the LOW to
HIGH clock transition. Both true and complemented outputs of each flip-flop
are provided. A Master Reset input resets all flip-flops, independent of the
Clock or D inputs, when LOW.
The LS175 is fabricated with the Schottky barrier diode process for high
speed and is completely compatible with all Motorola TTL families.
Edge-Triggered D-Type Inputs
Buffered-Positive Edge-Triggered Clock
Clock to Output Delays of 30 ns
Asynchronous Common Reset
True and Complement Output
Input Clamp Diodes Limit High Speed Termination Effects
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
CONNECTION DIAGRAM DIP
(TOP VIEW)
PIN NAMES
LOADING
(Note a)
HIGH
LOW
D0–D3
CP
MR
Q0–Q3
Q0–Q3
NOTES:
a. 1 TTL Unit Load (U.L.) = 40
μ
A HIGH/1.6 mA LOW.
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
b.
Temperature Ranges.
Data Inputs
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
True Outputs (Note b)
Complemented Outputs (Note b)
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
LOGIC DIAGRAM
SN54/74LS175
QUAD D FLIP-FLOP
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
16
1
D SUFFIX
SOIC
CASE 751B-03
LOGIC SYMBOL
相關PDF資料 |
PDF描述 |
|---|---|
| SN54LS175 | QUAD D FLIP-FLOP |
| SN54LS175J | QUAD D FLIP-FLOP |
| SN74LS175N | High Gain, High Linearity Active Bias Low Noise Amplifier |
| SN74LS181N | 4-BIT ARITHMETIC LOGIC UNIT |
| SN74LS194D | Low Noise Broadband Silicon RFIC Amplifier |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74LS175DE4 | 功能描述:觸發器 Quadruple D-Type Flip-Flop W/Clear RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LS175DG4 | 功能描述:觸發器 Quad D Type FlipFlop RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LS175DR | 功能描述:觸發器 Quadruple D-Type Flip-Flop W/Clear RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LS175DR2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS175DRE4 | 功能描述:觸發器 Quadruple D-Type Flip-Flop W/Clear RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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