- 您現在的位置：買賣IC網 > PDF目錄376416 > SN74LS77 (Motorola, Inc.) 4-BIT D LATCH LOW POWER SCHOTTKY PDF資料下載
參數資料
| 型號： | SN74LS77 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 4-BIT D LATCH LOW POWER SCHOTTKY |
| 中文描述： | 4位D鎖存低功耗肖特基 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 71K |
| 代理商： | SN74LS77 |
NOTES:
tn = bit time before enable
negative-going transition
tn+1 = bit time after enable
negative-going transition
5-1
FAST AND LS TTL DATA
4-BIT D LATCH
The TTL/MSI SN54/74LS75 and SN54/74LS77 are latches used as tem-
porary storage for binary information between processing units and input/out-
put or indicator units. Information present at a data (D) input is transferred to
the Q output when the Enable is HIGH and the Q output will follow the data
input as long as the Enable remains HIGH. When the Enable goes LOW, the
information (that was present at the data input at the time the transition oc-
curred) is retained at the Q output until the Enable is permitted to go HIGH.
The SN54/74LS75 features complementary Q and Q output from a 4-bit
latch and is available in the 16-pin packages. For higher component density
applications the SN54/74LS77 4-bit latch is available in the 14-pin package
with Q outputs omitted.
14
13
12
11
10
9
1
2
3
4
5
6
7
16
15
8
CONNECTION DIAGRAMS DIP
(TOP VIEW)
SN54/74LS75
14
13
12
11
10
9
1
2
3
4
5
6
D3
8
7
SN54/74LS77
Q0
Q0
Q1
Q1
E0–1
GND
Q2
Q2
Q3
D0
D1
E2–3
VCC
D2
D3
Q3
Q0
Q1
E0–1
GND
NC
Q2
Q3
D0
D1
E2–3
VCC
D2
NC
PIN NAMES
LOADING
(Note a)
HIGH
LOW
D1–D4
E0–1
E2–3
Q1–Q4
Q1–Q4
NOTES:
a) 1 Unit Load (U.L.) = 40
μ
A HIGH.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
Data Inputs
Enable Input Latches 0, 1
Enable Input Latches 2, 3
Latch Outputs (Note b)
Complimentary Latch Outputs (Note b)
0.5 U.L.
2.0 U.L.
2.0 U.L.
10 U.L.
10 U.L.
0.25 U.L.
1.0 U.L.
1.0 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
TRUTH TABLE
(Each latch)
tn
D
H
L
tn+1
Q
H
L
SN54/74LS75
SN54/74LS77
4-BIT D LATCH
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
ORDERING INFORMATION
SN54LSXXJ
SN74LSXXN
SN74LSXXD
Ceramic
Plastic
SOIC
16
1
D SUFFIX
SOIC
CASE 751B-03
J SUFFIX
CERAMIC
CASE 632-08
N SUFFIX
PLASTIC
CASE 646-06
14
1
14
1
14
1
D SUFFIX
SOIC
CASE 751A-02
相關PDF資料 |
PDF描述 |
|---|---|
| SN74LS798DW | TRI-STATE OCTAL BUFFERS |
| SN54LS795 | 8-Bit Serial or Parallel-Input/Serial Output Shift Register; Package: PDIP-16; No of Pins: 16; Container: Rail; Qty per Container: 500 |
| SN54LS795J | Hex D-Type Flip-Flop with Clock; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48 |
| SN54LS796 | Hex D-Type Flip-Flop with Clock; Package: SOIC 16 LEAD; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
| SN54LS796J | Hex D-Type Flip-Flop with Clock; Package: SOIC 16 LEAD; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74LS77J | 制造商:Motorola Inc 功能描述:Latch, Single, 4 Bit, 14 Pin, Ceramic, DIP |
| SN74LS78AJ | 制造商:Motorola Inc 功能描述: |
| SN74LS795DWR2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
| SN74LS796N | 制造商:Motorola Inc 功能描述: |
| SN74LS797N | 制造商:Motorola Inc 功能描述:Driver/Buffer Device, Dual, 4-Bit, 20 Pin, Plastic, DIP |
發布緊急采購，3分鐘左右您將得到回復。