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參數資料
| 型號： | SN74LVC1G00DCKTE4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 門電路 |
| 英文描述： | LVC/LCX/Z SERIES, 2-INPUT NAND GATE, PDSO5 |
| 封裝： | GREEN, PLASTIC, SC-70, 5 PIN |
| 文件頁數： | 1/19頁 |
| 文件大小： | 843K |
| 代理商： | SN74LVC1G00DCKTE4 |
See mechanical drawings for dimensions.
NC – No internal connection
DBV PACKAGE
(TOP VIEW)
2
5
3
4
Y
1
B
GND
A
V
CC
DCK PACKAGE
(TOP VIEW)
3
4
GND
2
B
Y
1
A
5
V
CC
DRL PACKAGE
(TOP VIEW)
2
B
1
A
3
4
GND
Y
5
V
CC
YZP PACKAGE
(BOTTOM VIEW)
2
B
1
A
GND
4
3
Y
5
V
CC
DRY PACKAGE
(TOP VIEW)
B
NC
A
6
5
4
2
3
GND
Y
V
CC
1
6
5
4
2
3
1
DSF PACKAGE
(TOP VIEW)
B
A
GND
NC
Y
V
CC
SCES212W
– APRIL 1999 – REVISED MARCH 2011
SINGLE 2-INPUT POSITIVE-NAND GATE
Check for Samples: SN74LVC1G00
1
FEATURES
Available in the Texas Instruments NanoStar
Ioff Supports Partial-Power-Down Mode
Package
Operation
Supports 5-V VCC Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Inputs Accept Voltages to 5.5 V
ESD Protection Exceeds JESD 22
Max tpd of 3.8 ns at 3.3 V
– 2000-V Human-Body Model (A114-A)
Low Power Consumption, 10-
μA Max ICC
– 1000-V Charged-Device Model (C101)
±24-mA Output Drive at 3.3 V
DESCRIPTION/ORDERING INFORMATION
This single 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G00 performs the Boolean function Y = A
● B or Y = A + B in positive logic.
NanoStar
package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright
1999–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SN74LVC1G00DCKTG4 | 功能描述:邏輯門 SNGL 2 Input Pos NAND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LVC1G00DPWR | 功能描述:NAND Gate IC 1 Channel 4-X2SON (0.80x0.80) 制造商:texas instruments 系列:74LVC 包裝:剪切帶（CT） 零件狀態:有效 邏輯類型:與非門 電路數:1 輸入數:2 特性:- 電壓 - 電源:1.65 V ~ 5.5 V 電流 - 靜態（最大值）:10μA 電流 - 輸出高，低:32mA，32mA 邏輯電平 - 低:0.7 V ~ 0.8 V 邏輯電平 - 高:1.7 V ~ 2 V 不同 V，最大 CL 時的最大傳播延遲:4.3ns @ 5V，50pF 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 供應商器件封裝:4-X2SON（0.80x0.80） 封裝/外殼:4-XFDFN 裸露焊盤 標準包裝:1 |
| SN74LVC1G00DRLR | 功能描述:邏輯門 Sngl 2 Inpt Pos NAND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LVC1G00DRLRG4 | 功能描述:邏輯門 SNGL 2 Input Pos NAND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LVC1G00DRYR | 功能描述:邏輯門 Sgl 2-Input Pos-NAND Gate RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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