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DCTPACKAGE
(TOP VIEW)
DCUPACKAGE
(TOP VIEW)
1
V
CC
8
1OE
2
7
1A
2OE
3
6
2Y
1Y
4
5
GND
2A
3
6
1Y
2Y
8
1
V
CC
1OE
5
GND
4
2A
2
7
2OE
1A
GND
5
4
2A
3 6
1Y
2Y
2 7
2OE
1A
8
V
CC
1
1OE
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOMVIEW)
DESCRIPTION/ORDERING INFORMATION
DUAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES208G – APRIL 1999 – REVISED SEPTEMBER 2006
Available in the Texas Instruments
Typical V
OHV (Output VOH Undershoot) >2 V at
NanoStar and NanoFree Packages
V
CC = 3.3 V, TA = 25°C
Supports 5-V V
CC Operation
I
off Supports Partial-Power-Down Mode
Operation
Inputs Accept Voltages to 5.5 V
Latch-Up Performance Exceeds 100 mA Per
Max t
pd of 4.6 ns at 3.3 V
JESD 78, Class II
Low Power Consumption, 10-
A Max I
CC
ESD Protection Exceeds JESD 22
±24-mA Output Drive at 3.3 V
– 2000-V Human-Body Model (A114-A)
Typical V
OLP (Output Ground Bounce) <0.8 V
– 1000-V Charged-Device Model (C101)
at V
CC = 3.3 V, TA = 25°C
This dual buffer/driver is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G240 is designed specifically to improve the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar – WCSP (DSBGA)
SN74LVC2G240YEAR
0.17-mm Small Bump – YEA
NanoFree – WCSP (DSBGA)
0.17-mm Small Bump – YZA
SN74LVC2G240YZAR
(Pb-free)
Tape and reel
_ _ _CK_
NanoStar – WCSP (DSBGA)
SN74LVC2G240YEPR
–40
°C to 85°C 0.23-mm Large Bump – YEP
NanoFree – WCSP (DSBGA)
0.23-mm Large Bump – YZP
SN74LVC2G240YZPR
(Pb-free)
SSOP – DCT
Tape and reel
SN74LVC2G240DCTR
C40_ _ _
VSSOP – DCU
Tape and reel
SN74LVC2G240DCUR
C40_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 1999–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.