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參數資料
型號: SN74LVC3G07DCUTG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 門電路
英文描述: LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8
封裝: GREEN, PLASTIC, VSSOP-8
文件頁數: 1/14頁
文件大小: 501K
代理商: SN74LVC3G07DCUTG4
www.ti.com
FEATURES
3A
3
2
5
8
1
1A
VCC
3Y
GND
DCT PACKAGE
(TOP VIEW)
DCU PACKAGE
(TOP VIEW)
3
2
4
5
1
1A
VCC
1Y
3Y
GND
3Y
GND
VCC
2Y
2A
See mechanical drawings for dimensions.
2
5
3
4
8
2A
3A
2Y
2A
1Y
2Y
4
6
7
6
7
8
6
1
7
1A
3A
1Y
YZP PACKAGE
(BOTTOM VIEW)
DESCRIPTION/ORDERING INFORMATION
TRIPLE BUFFER/DRIVER
WITH OPEN-DRAIN OUTPUTS
SCES365J – AUGUST 2001 – REVISED FEBRUARY 2007
Available in the Texas Instruments
Typical V
OHV (Output VOH Undershoot) >2 V at
NanoFree Package
V
CC = 3.3 V, TA = 25°C
Supports 5-V V
CC Operation
I
off Supports Partial-Power-Down Mode
Operation
Max t
pd of 3.7 ns at 3.3 V
Latch-Up Performance Exceeds 100 mA Per
Low Power Consumption, 10-A Max I
CC
JESD 78, Class II
±24-mA Output Drive at 3.3 V
ESD Protection Exceeds JESD 22
Input and Open-Drain Output Accepts
2000-V Human-Body Model (A114-A)
Voltages up to 5.5 V
200-V Machine Model (A115-A)
Typical V
OLP (Output Ground Bounce) <0.8 V
at V
CC = 3.3 V, TA = 25°C
1000-V Charged-Device Model (C101)
This triple buffer/driver is designed for 1.65-V to 5.5-V VCC operation.
NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
The output of the SN74LVC3G07 is open drain and can be connected to other open-drain outputs to implement
active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoFree – WCSP (DSBGA)
Reel of 3000
SN74LVC3G07YZPR
_ _ _CV
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
Reel of 3000
SN74LVC3G07DCTR
C07_ _ _
–40°C to 85°C
Reel of 3000
SN74LVC3G07DCUR
VSSOP – DCU
C07_
Reel of 250
SN74LVC3G07DCUT
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 2001–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
相關PDF資料
PDF描述
SN74LVC3G07DCUR LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8
SN74LVC3G14YZAR LVC/LCX/Z SERIES, TRIPLE 1-INPUT INVERT GATE, BGA8
SN74LVC3G14YEPR LVC/LCX/Z SERIES, TRIPLE 1-INPUT INVERT GATE, BGA8
SN74LVC3G34DCTRE4 LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8
SN74LVC3G34YZAR LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, BGA8
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