欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號: SN74LVTH16245ADGVR
廠商: TEXAS INSTRUMENTS INC
元件分類: 總線收發(fā)器
英文描述: LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48
封裝: GREEN, PLASTIC, TVSOP-48
文件頁數(shù): 1/20頁
文件大小: 637K
代理商: SN74LVTH16245ADGVR
www.ti.com
FEATURES
SN54LVTH16245A . . . WD PACKAGE
SN74LVTH16245A . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE
DESCRIPTION/ORDERING INFORMATION
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS143R – MAY 1992 – REVISED NOVEMBER 2006
Members of the Texas Instruments Widebus
Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
Support Unregulated Battery Operation Down
to 2.7 V
Typical V
OLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
Distributed V
CC and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
I
off and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
The 'LVTH16245A devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage
(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The devices are designed for asynchronous communication between two data buses. The logic levels of the
direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level
applied to prevent excess ICC and ICCZ.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 1992–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters are
Instruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, production
necessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.
相關(guān)PDF資料
PDF描述
SN74LVTH16245AKR LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PBGA56
SN74LVTH16245BDLR LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48
SN74LVTH16373DLR LVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48
SN74LVTH16374DLR LVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48
SN74LVTH16501DGGR LVT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN74LVTH16245ADL 功能描述:總線收發(fā)器 Tri-State ABT 16-Bit RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74LVTH16245ADL 制造商:Texas Instruments 功能描述:Universal Bus Function IC
SN74LVTH16245ADLR 功能描述:總線收發(fā)器 Tri-State ABT 16-Bit RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74LVTH16245AGQLR 功能描述:總線收發(fā)器 Tri-State ABT 16-Bit RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
SN74LVTH16245AGRDR 功能描述:總線收發(fā)器 3.3-V ABT 16-Bit Bus Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
主站蜘蛛池模板: 凤台县| 军事| 壶关县| 会泽县| 苍南县| 清徐县| 平湖市| 建平县| 平乡县| 界首市| 浙江省| 星座| 肥城市| 昌乐县| 蒲城县| 宝兴县| 宣化县| 清原| 汉川市| 绥宁县| 马边| 冕宁县| 交城县| 永靖县| 沛县| 荣成市| 灌云县| 武安市| 拉萨市| 宁晋县| 海丰县| 天津市| 孝昌县| 浙江省| 丰镇市| 平远县| 酉阳| 忻州市| 若尔盖县| 荆州市| 绥芬河市|