
SN54HCT573, SN74HCT573
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS176E – MARCH 1984 – REVISED JULY 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Operating Voltage Range of 4.5 V to 5.5 V
D High-Current 3-State Outputs Drive Bus
Lines Directly or Up To 15 LSTTL Loads
D Low Power Consumption, 80-A Max ICC
D Typical tpd = 21 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 A Max
D Inputs Are TTL-Voltage Compatible
D Bus-Structured Pinout
description/ordering information
These octal transparent D-type latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. The ’HCT573 devices are particularly
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
registers.
While the latch-enable (LE) input is high, the
Q outputs respond to the data (D) inputs. When
LE is low, the outputs are latched to retain the data
that was set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state
(high
or
low
logic
levels)
or
the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased
drive provide the capability to drive bus lines without interface or pullup components.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74HCT573N
SOIC
DW
Tube
SN74HCT573DW
HCT573
SOIC – DW
Tape and reel
SN74HCT573DWR
HCT573
–40
°C to 85°C
SOP – NS
Tape and reel
SN74HCT573NSR
HCT573
SSOP – DB
Tape and reel
SN74HCT573DBR
HT573
TSSOP
PW
Tube
SN74HCT573PW
HT573
TSSOP – PW
Tape and reel
SN74HCT573PWR
HT573
CDIP – J
Tube
SNJ54HCT573J
–55
°C to 125°C
CFP – W
Tube
SNJ54HCT573W
LCCC – FK
Tube
SNJ54HCT573FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
32 1 20 19
910 11 1213
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
2D
1D
OE
8Q
7Q
V
1Q
8D
GND
LE
SN54HCT573 . . . FK PACKAGE
(TOP VIEW)
CC
SN54HCT573 ...J OR W PACKAGE
SN74HCT573 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
Copyright
2003, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.