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參數資料
型號: SPAK56857BU120
廠商: MOTOROLA INC
元件分類: 數字信號處理
英文描述: 120 MIPS Hybrid Processor
中文描述: 0-BIT, 4 MHz, OTHER DSP, PQFP100
封裝: LQFP-100
文件頁數: 1/2頁
文件大?。?/td> 247K
代理商: SPAK56857BU120
The 56857 offers a rich feature set and on-chip
memory in a 100-pin LQFP. It includes 80 KB of
on-chip program SRAM and 48 KB of on-chip data
SRAM. With two enhanced serial synchronous
serial interfaces (ESSIs), this device can provide
outputs for 5.1-channel surround sound. The 56857
can be designed into multi-processor systems to
provide internet audio and speech processing
functionalities.
JTAG/EOnCE
PLL
16-Bit Quad Timer
Up to 47 GPIO
COP/Watchdog
(2) SCI
Data Memory
56800E Core
120 MIPS
2 KB Boot ROM
80 KB SRAM
Program Memory
48 KB SRAM
Prog Chip Selects
Time of Day
6-channel DMA
(2) ESSI
SPI
8-Bit Host
BENEFITS
Easy to program with flexible
application development tools
Supports multiple processor
connections
16-bit quad timer module (with four
external pins) that allows
capture/compare functionality, and can
be cascaded
Quad timer module can also be used for
simple digital-to-analog conversion
functionality
Enhanced synchronous serial interface
with enhanced network and audio modes
Time of Day for applications requiring
clock display
Flexible 6-Channel Direct Memory
Access (DMA) allows both internal and
external memory transfers with almost
no CPU interruption
Serial peripheral interface with master
and slave mode supporting connection
to other processors or serial memory
devices
Two enhanced synchronous serial
interfaces with three transmitters per
module provide support for
5.1 channel surround sound for audio
applications
56857 16-BIT DIGITAL SIGNAL PROCESSORS
120 MIPS at 120MHz
80 KB Program SRAM
48 KB Data SRAM
2 KB Boot ROM
Six independent channels of DMA
Two Enhanced Synchronous Serial
Interfaces (ESSI)
Two Serial Communication Interfaces
(SCI)
Serial Peripheral Interface (SPI)
Four dedicated GPIO
8-bit parallel Host Interface
General purpose 16-bit Quad Timer
JTAG/Enhanced On-Chip Emulation
(OnCE) for unobtrusive, real-time
debugging
Computer Operating Properly
(COP)/Watchdog Timer
Time of Day (TOD)
100-pin LQFP package
Up to 47 GPIO
ENERGY INFORMATION
Fabricated in high-density CMOS with
3.3V, TTL-compatible digital inputs
Wait and Stop modes available
TARGET APPLICATIONS
HYBRID MCU/DSP
56857
120 MIPS Hybrid Processor
Multi-processor Telephony
Systems
Stand-alone MP3 player
DTAD
Feature phone
Voice recognition and command
Embedded modem/data pump
LCD and keypad support
General purpose devices
Automotive hands-free
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關PDF資料
PDF描述
SPAKMC331MFV16 User’s Manual
SPAKMC331MFV20 User’s Manual
SPAKMC331MPV16 User’s Manual
SPAKMC331MPV20 User’s Manual
SPAKMC331VFC16 User’s Manual
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