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HIGH SPEED: t
PD
= 4.3ns (MAX.) at T
A
=85°C
V
CCB
= 1.65V; V
CCA
= 3.0V
LOW POWER DISSIPATION:
I
CCA
= I
CCB
= 5
μ
A(MAX.) at T
A
=85°C
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OHA
| = I
OLA
= 10mA MIN at
V
CCA
= 2.75V; V
CCB
= 1.4V to 3.6V
|I
OHB
| = I
OLB
= 4mA MIN at
V
CCB
= 1.65V; V
CCA
= 1.4 to 3.6V)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
26
SERIES RESISTOR ON A SIDE OUTPUTS
OPERATING VOLTAGE RANGE:
V
CCA
(OPR) = 1.4V to 3.6V (1.2V Data Retent)
V
CCB
(OPR) = 1.4V to 3.6V (1.2V Data Retent)
MAX DATA RATES:
380 Mbps (1.8V to 3.3V translation)
260 Mbps (<1.8V to 3.3V translation)
260 Mbps (Translate to 2.5V)
210 Mbps (Translate to 1.5V)
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
R
O
HS Compliant for FLIPCHIP Package
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DESCRIPTION
The ST4G3235 is a dual supply low voltage
CMOS 4-BIT BUS BUFFER level translator
fabricated with sub-micron silicon gate and
five-layer metal wiring C
2
MOS technology.
Designed for use as an interface between a 3.3V
bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V,
3.3V/2.5V, 1.8V/1.4V and 2.5V/1.8V supply
systems, it achieves high speed operation while
maintaining the CMOS low power dissipation.
This IC is intended for one-way asynchronous
communication between data buses. The input
and output power down protections disable the
device when both power supply are down, so that
the buses are effectively isolated.
The input tolerant buffers allow to translate V
CCB
compatible signals and greater signals than V
CCB
up/down to V
CCA
and viceversa.
All inputs are equipped with protection circuits
against static discharge, giving them ESD immuni-
ty and transient excess voltage.
ST4G3235
4-BIT DUAL SUPPLY BUS BUFFER LEVEL TRANSLATOR
WITH A SIDE SERIES RESISTOR
Table 1: Order Codes
PACKAGE
T & R
Comments
FLIPCHIP11
ST4G3235BJR
5000 parts per reel
FLIPCHIP
Figure 1: Logic Diagram
Rev. 6