
STLC7545
ENHANCED V.34 BIS ANALOG FRONT-END
.
FULLECHO CANCELLING CAPABILITY
.
FULLYCOMPATIBLE WITH THE ST7544
.
16-BIT OVERSAMPLING A/D AND D/A CON-
VERTERS
- Programmable down-sampling frequency
from 7200 to 22kHz.
- Samplingfrequencycan be 3, 4, 6, 8, 12, 16x
symbol rate.
- ProgrammableOversamplingfrequency(128,
160 or 192x sampling frequency).
- The STLC7545 can work with external over-
samplingclocks.
- Programmablesymbolrate (600, 1200,1600,
2400, 2560, 2743, 2800, 2954, 3000, 3200,
3429 and 3491).
- Bit rates of 300bps, 600bps, 1200 and all
multiples of 2400bps up to 38400bpscan be
generated.
- Dynamic range : 92dB with a sampling fre-
quency9600Hz, oversampling ratio 160.
- Total harmonic distortion : -89dB.
.
ON CHIP REFERENCE VOLTAGE
.
THREE PROGRAMMABLE DIGITAL FILTERS
SECTIONS(up to 14thorder each, coefficients
loaded into RAM) :
- Tx interpolationfilter
- Rx decimationfilter
- Rx reconstructionfilter
.
ANCILLARY CONVERTERS FOR EYE-DIA-
GRAM MONITORING
.
CLOCK
PHASELOCKED LOOPS
- SeparateTx DPLL and Rx DPLL
- Terminalclockinput forTx synchronizationon
allmultiplesof 2400Hz(VFastsynchronization
mode) or on sub-multiple of baud rate (7544
synchronizationmode)
- Bit, Baud, sampling and highest synchronous
clock outputs
- Maximummaster clock frequency is 38MHz
.
SINGLE OR DUAL SYNCHRONOUS SERIAL
INTERFACETO DSP
.
ANALOGPOWER SUPPLYVOLTAGE: +5V
.
DIGITALPOWER SUPPLYFROM 3.3VTO 5V
.
LOWPOWER CONSUMPTION :
- 100mWoperatingpowerat thenominalcrystal
frequencyof36.864MHz(digitalsupplyat3.3V)
- Lessthan5mWin theLow-PowerResetMode
.
0.7
μ
m CMOS PROCESS
.
PLCC44 OR TQFP44(1.4mm body thickness)
November 1998
SYSTEM
BASED
ON
DIGITAL
DESCRIPTION
TheSTLC7545isasinglechipAnalogFront-End(AFE)
designed to implement high speed voice-grade Mo-
demsupto384kbpswithechocancellingcapability.
Associatedwith oneorseveralDigital SignalProces-
sors (DSP), it provides a powerful solution for the
implementation of multi-mode Modems meeting
CCITT (V.17,V.21,V.22,V.22bis, V.23, V.26,V.27,
V.29,V.32,V.32bis,V.33,V.34andV.34bis)andBELL
(103,202, 212A...)recommendations.Itis fully com-
patiblewiththeST7544andisalsowellsuitedemerg-
ing applicationsinvolvingbitratesupto 38400bps(in
theVFastsynchronizationmode).
The transmit section includes a 16-bit over-sampling
D/Aconverterwith aprogrammableinterpolatingfilter.
Thereceivesectionincludesa16-bitoversamplingA/D
converterwithtwoprogrammablefilters (onefordeci-
mationandtheotherforreconstruction).Oversampling
ratioisselectabletoeither128,160or192.Twoaddi-
tional8-bitD/Aconvertersalloweyediagrammonitoring
onascopeformodemperformanceadjustment.
Twoindependantclockgeneratorsystemsarepro-
vided, one synchronized on the Tx rate and the
other on the Rx rate.
In External Clock Mode, external oversampling
clockscan be provided to the chip.
Two independant synchronous serial interfaces
(SSI) allowseveral versatile ways of communicat-
ing with standard DSPs.
Tosavepower,e.g.inlap-topmodemapplications,
the lowpower reset mode can be used to reduce
the power consumptionto less than 5mW.
PLCC44
(Plastic Leaded Chip Carrier)
ORDER CODE :
STLC7545CFN
TQFP44
(10 x 10 x 1.4mm)
(Thin Full Plastic Quad Flat Pack)
ORDER CODE :
STLC7545TQFP4Y
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