參數資料
| 型號： | SY100E111JY |
| 廠商： | Micrel Inc |
| 文件頁數： | 1/4頁 |
| 文件大小： | 0K |
| 描述： | IC CLK FANOUT BUFFER 1:9 28-PLCC |
| 標準包裝： | 38 |
| 系列： | 100E, ECLinPS™ |
| 類型： | 扇出緩沖器（分配） |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 1:9 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | PECL |
| 輸出： | PECL |
| 電源電壓： | 4.2 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應商設備封裝： | 28-PLCC |
| 包裝： | 管件 |
| 產品目錄頁面： | 1087 (CN2011-ZH PDF) |
| 其它名稱： | 576-2429 SY100E111JY-ND |
1
SY10E111
SY100E111
Micrel, Inc.
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
BLOCK DIAGRAM
IN
VBB
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
IN
EN
FEATURES
s Low skew
s Extended 100E V
EE range of –4.2V to –5.5V
s Guaranteed skew limits
s Differential design
s V
BB output
s Enable input
s Fully compatible with industry standard 10KH, 100K
I/O levels
s 75K
input pulldown resistors
s Fully compatible with ON Semiconductor
MC10E/100E111
s Available in 28-pin PLCC package
The SY10/100E111 are low skew 1-to-9 differential
drivers designed for clock distribution in new, high-
performance ECL systems. They accept one differential or
single-ended input, with VBB used for single-ended
operation. The signal is fanned out to nine identical
differential outputs. An enable input is also provided such
that a logic HIGH disables the device by forcing all Q
outputs LOW and all /Q outputs HIGH.
The device is specifically designed and produced for low
skew. The interconnect scheme and metal layout are
carefully optimized for minimal gate-to-gate skew within
the device. Wafer characterization and process control
ensure consistent distribution of propagation delay from lot
to lot. Since the E111 shares a common set of “basic”
processing with the other members of the ECLinPS
family, wafer characterization at the point of device
personalization allows for tighter control of parameters,
including propagation delay.
To ensure that the skew specification is met, it is
necessary that both sides of the differential output are
terminated into 50
, even if only one side is being used. ln
most applications, all nine differential pairs will be used
and, therefore, terminated. In the case where fewer than
nine pairs are used, it is necessary to terminate at least the
output pairs on the same package side (i.e. sharing the
same VCCO as the pair(s) being used on that side) in order
to maintain minimum skew.
The VBB output is intended for use as a reference
voltage for single-ended reception of ECL signals to that
device only. When using VBB for this purpose, it is
recommended that VBB is decoupled to VCC via a 0.01F
capacitor.
1:9 DIFFERENTIAL CLOCK
DRIVER WITH ENABLE
DESCRIPTION
SY10E111
SY100E111
Rev.: E
Amendment: /0
Issue Date:
March 2006
Pin
Function
IN, /IN
Differential Input Pair
/EN
Enable Input
Q0, /Q0 — Q8, /Q8
Differential Outputs
VBB
VBB Output
VCCO
VCC to Output
PIN NAMES
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SY100E111JY TR | 功能描述:緩沖器和線路驅動器 Recommend SY100E111AJY TR for New Designs (I Temp, Lead Free) RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SY100E111JYTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:1:9 DIFFERENTIAL CLOCK DRIVER WITH ENABLE |
| SY100E111LE | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5V/3.3V 1:9 DIFFERENTIAL CLOCK DRIVER (w/ENABLE) |
| SY100E111LEJC | 功能描述:IC CLK FANOUT BUFFER 1:9 28-PLCC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:100E, Precision Edge® 標準包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復用器 電路數:1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| SY100E111LEJC TR | 功能描述:IC CLK FANOUT BUFFER 1:9 28-PLCC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:100E, Precision Edge® 標準包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復用器 電路數:1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
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