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參數資料
| 型號： | SY100E212JZ |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3-BIT SCANNABLE REGISTER |
| 中文描述： | 100E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28 |
| 封裝： | LEAD FREE, PLASTIC, LCC-28 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 71K |
| 代理商： | SY100E212JZ |
1
SY10E212
SY10E212
SY100E212
Micrel, Inc.
M9999-032206
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
FEATURES
I
Scannable version E112 driver
I
Extended 100E V
EE
range of –4.2V to –5.5V
I
1025ps max. CLK to Output
I
Dual differential outputs
I
Master Reset
I
Internal 75K
input pull-down resistors
I
Fully compatible with industry standard 10KH,
100K ECL levels
I
Fully compatible with Motorola MC10E/100E212
I
Available in 28-pin PLCC package
The SY10/100E212 are scannable registered ECL
drivers typically used as fan-out memory address drivers
for ECL cache driving. In a VLSI array-based CPU design,
use of the E212 allows the user to conserve array output
cell functionality and also output pins.
The input shift register is designed with control logic
which greatly facilitates its use in boundary scan
applications.
3-BIT SCANNABLE
REGISTER
BLOCK DIAGRAM
Q
2b
Q
2a
Q
2a
Q
2b
D
Q
D
2
Q
1b
Q
1a
Q
1a
Q
1b
D
Q
D
1
Q
0b
Q
0a
Q
0a
Q
0b
D
Q
D
0
S-OUT
S-IN
LOAD
SHIFT
CLK
MR
Pin
Function
D
0
– D
2
Data Inputs
S-IN
Scan Input
LOAD
LOAD/HOLD Control
SHIFT
Scan Control
CLK
Clock
MR
Master Reset
S-OUT
Scan Output
Q[0:2]a, Q[0:2]b
True Outputs
Q[0:2]a, Q[0:2]b
Inverting Outputs
V
CCO
V
CC
to Output
PIN NAMES
Rev.: F
Issue Date:
Amendment: /0
March 2006
相關PDF資料 |
PDF描述 |
|---|---|
| SY100E212JZTR | 3-BIT SCANNABLE REGISTER |
| SY100E222L | 3.3V, 1.5GHz 1 / 2 DIFFERENTIAL LVECL/LVPECL PROGRAMMABLE CLOCK GENERATOR AND 1:15 FANOUT BUFFER |
| SY100E222LTI | 3.3V, 1.5GHz 1 / 2 DIFFERENTIAL LVECL/LVPECL PROGRAMMABLE CLOCK GENERATOR AND 1:15 FANOUT BUFFER |
| SY100E222LTITR | 3.3V, 1.5GHz 1 / 2 DIFFERENTIAL LVECL/LVPECL PROGRAMMABLE CLOCK GENERATOR AND 1:15 FANOUT BUFFER |
| SY100E310JI | 3.3V ECL/PECL 2:8 DIFFERENTIAL FANOUT BUFFER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SY100E212JZ TR | 功能描述:IC REGISTER 3BIT SCAN 28-PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:100E 產品變化通告:Product Discontinuation 25/Apr/2012 標準包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數:14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應商設備封裝:48-TSSOP 包裝:帶卷 (TR) |
| SY100E212JZTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3-BIT SCANNABLE REGISTER |
| SY100E222L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 1.5GHz ±1/±2 DIFFERENTIAL LVECL/LVPECL PROGRAMMABLE CLOCK GENERATOR AND 1:15 FANOUT BUFFER |
| SY100E222L_06 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 1.5GHz ±1/±2 DIFFERENTIAL LVECL/LVPECL PROGRAMMABLE CLOCK GENERATOR AND 1:15 FANOUT BUFFER |
| SY100E222L_11 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 1.5GHz ?·1/?·2 DIFFERENTIAL LVECL/LVPECL PROGRAMMABLE CLOCK |
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