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參數資料
| 型號： | SY100E452JI |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 5-BIT DIFFERENTIAL REGISTER |
| 中文描述： | 100E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 63K |
| 代理商： | SY100E452JI |
Pin
Function
D [0:4], /D [0:4]
Differential Data Inputs
MR
Master Reset Input
CLK, /CLK
Differential Clock Input
V
BB
V
BB
Reference Output
Q [0:4], Q [0:4]
Differential Data Outputs
V
CCO
V
CC
to Output
DESCRIPTION
FEATURES
I
Differential D, CLK and Q
I
Extended 100E V
EE
range of –4.2V to –5.5V
I
VBB output for single-ended use
I
1100MHz min. toggle frequency
I
Asynchronous Master Reset
I
Fully compatible with Motorola MC10E/100E452
I
Available in 28-pin PLCC package
The SY10/100E452 are 5-bit differential registers with
differential data (inputs and outputs) and clock. The
registers are triggered by a positive transition of the
positive clock (CLK) input. A high on the Master Reset
(MR) asynchronously resets all registers so that the Q
outputs go LOW.
The differential input structures are clamped so that
the inputs of unused registers can be left open without
upsetting the bias network of the devices. The clamping
action will assert the /D and the /CLK sides of the inputs.
Because of the edge-triggered flip-flop nature of the
devices, simultaneously opening both the clock and data
inputs will result in an output which reaches an
unidentified but valid state.
The fully differential design of the devices makes them
ideal for very high frequency applications where a
registered data path is necessary.
5-BIT DIFFERENTIAL
REGISTER
SY10E452
SY100E452
Rev.: D
Issue Date:
Amendment: /0
May, 1999
BLOCK DIAGRAM
D
0
D
0
Q
0
Q
0
V
BB
CLK
CLK
MR
D
Q
R
D
1
D
1
Q
1
Q
1
D
Q
R
D
2
D
2
Q
2
Q
2
D
Q
R
D
3
D
3
Q
3
Q
3
D
Q
R
D
4
D
4
Q
4
Q
4
D
Q
R
PIN CONFIGURATION
PIN NAMES
18
17
16
15
14
13
12
5
6
7
8
9
10 11
26
27
28
1
2
3
4
TOP VIEW
PLCC
J28-1
25 24 23 22 21 20 19
MR
CLK
CLK
V
EE
V
BB
D
2
D
2
D
1
D
0
V
C
Q
0
D
1
D
0
Q
0
Q
3
Q
3
V
CC
Q
2
Q
2
Q
1
Q
1
D
4
V
C
Q
4
D
3
D
3
D
4
Q
4
1
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PDF描述 |
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| SY100E452JITR | 5-BIT DIFFERENTIAL REGISTER |
| SY10E457JC | TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER |
| SY100E457JC | TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER |
| SY10E457JCTR | TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SY100E452JI TR | 功能描述:IC REGISTER 5-BIT DIFF 28-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 觸發器 系列:100E 標準包裝:25 系列:74LS 功能:設置（預設）和復位 類型:JK 型 輸出類型:差分 元件數:2 每個元件的位元數:1 頻率 - 時鐘:25MHz 延遲時間 - 傳輸:20ns 觸發器類型:負邊沿 輸出電流高，低:400µA, 8mA 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 包裝:管件 其它名稱:74LS11274LS112AN74LS112NDM74LS112N |
| SY100E452JITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5-BIT DIFFERENTIAL REGISTER |
| SY100E452JY | 功能描述:寄存器 6-bit Register Differential Data Clock (I Temp, Lead Free) RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SY100E452JY TR | 功能描述:寄存器 6-bit Register Differential Data Clock (I Temp, Lead Free) RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SY100E457 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER |
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