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參數資料
| 型號： | SY100EL14VZGTR |
| 廠商： | MICREL INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 5V/3.3V 1:5 CLOCK DISTRIBUTION |
| 中文描述： | 100EL SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封裝： | 0.300 INCH, LEAD FREE, SOIC-20 |
| 文件頁數： | 1/5頁 |
| 文件大?。?/td> | 69K |
| 代理商： | SY100EL14VZGTR |
1
Precision Edge
Precision Edge
SY100EL14V
Micrel, Inc.
M9999-031006
hbwhelp@micrel.com or (408) 955-1690
The SY100EL14V is a low skew 1:5 clock distribution
chip designed explicitly for low skew clock distribution
applications. The device can be driven by either a
differential or single-ended ECL or, if positive power
supplies are used, PECL input signal. The EL14V is
suitable for operation in systems operating from 3.3V to
5.0V supplies. If a single-ended input is to be used the
V
BB
output should be connected to the CLK input and
bypassed to ground via a 0.01
μ
F capacitor. The V
BB
output is designed to act as the switching reference for
the input of the EL14V under single-ended input
conditions, as a result this pin can only source/sink up to
0.5mA of current.
The EL14V features a multiplexed clock input to allow
for the distribution of a lower speed scan or test clock
along with the high speed system clock. When LOW (or
left open and pulled LOW by the input pull-down resistor)
the SEL pin will select the differential clock input.
The common enable (EN) is synchronous so that the
outputs will only be enabled/disabled when they are
already in the LOW state. This avoids any chance of
generating a runt clock pulse when the device is enabled/
disabled as can happen with an asynchronous control.
The internal flip flop is clocked on the falling edge of the
input clock, therefore all associated specification limits
are referenced to the negative edge of the clock input.
When both differential inputs are left open, CLK input
will pull down to V
EE
and CLK input will bias around
V
CC
/2.
FEATURES
DESCRIPTION
I
3.3V and 5V power supply options
I
Typical 30ps output-to-output skew
I
Max. 50ps output-to-output skew
I
Synchronous enable/disable
I
Multiplexed clock input
I
75K
internal input pull-down resistors
I
Available in 20-pin SOIC package
5V/3.3V 1:5 CLOCK
DISTRIBUTION
Rev.: D
Issue Date: March 2006
Amendment: /0
Precision Edge is a registered trademark of Micrel, Inc.
Precision Edge
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PDF描述 |
|---|---|
| SY100EL14VZI | 5V/3.3V 1:5 CLOCK DISTRIBUTION |
| SY100EL14VZITR | 5V/3.3V 1:5 CLOCK DISTRIBUTION |
| SY100EL15ZG | 1:4 CLOCK DISTRIBUTION |
| SY100EL15ZGTR | 1:4 CLOCK DISTRIBUTION |
| SY100EL16SZC | 5V VARIABLE OUTPUT SWING DIFFERENTIAL RECEIVER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| SY100EL14VZG-TR | 功能描述:Clock Fanout Buffer (Distribution), Multiplexer IC 20-SOIC (0.295", 7.50mm Width) 制造商:microchip technology 系列:100EL，Precision Edge? 包裝:剪切帶（CT） 零件狀態:有效 類型:扇出緩沖器（分配），多路復用器 電路數:1 比率 - 輸入:輸出:2：5 差分 - 輸入:輸出:是/是 輸入:ECL，PECL 輸出:ECL，PECL 頻率 - 最大值:- 電壓 - 電源:3 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應商器件封裝:20-SOIC W 標準包裝:1 |
| SY100EL14VZI | 功能描述:IC CLOCK BUFFER MUX 2:5 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:100EL, Precision Edge® 標準包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復用器 電路數:1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| SY100EL14VZI TR | 功能描述:IC CLOCK BUFFER MUX 2:5 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:100EL, Precision Edge® 標準包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復用器 電路數:1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| SY100EL14VZITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5V/3.3V 1:5 CLOCK DISTRIBUTION |
| SY100EL15 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:1:4 CLOCK DISTRIBUTION |
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