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參數資料
| 型號： | SY100EP195VTG |
| 廠商： | MICREL INC |
| 元件分類： | 延遲線 |
| 英文描述： | ACTIVE DELAY LINE, COMPLEMENTARY OUTPUT, PQFP32 |
| 封裝： | TQFP-32 |
| 文件頁數： | 1/18頁 |
| 文件大?。?/td> | 701K |
| 代理商： | SY100EP195VTG |
1
ECL Pro
SY100EP195V
Micrel, Inc.
M9999-120505
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
■ Pin-for-pin, plug-in compatible to the ON
Semiconductor MC100EP195
■ Maximum frequency > 2.5GHz
■ Programmable range: 2.2ns to 12.2ns
■ 10ps increments
■ PECL mode operating range: V
CC = 3.0V to 5.5V
with VEE = 0V
■ NECL mode operating range: V
CC = 0V
with VEE = –3.0V to –5.5V
■ Open input default state
■ Safety clamp on inputs
■ A logic high on the /EN pin will force Q to logic low
■ D[0:10] can accept either ECL, CMOS, or TTL inputs
■ V
BB output reference voltage
■ Available in a 32-pin TQFP package
FEATURES
3.3V/5V 2.5GHz
PROGRAMMABLE DELAY
ECL Pro
SY100EP195V
APPLICATIONS
■ Clock de-skewing
■ Timing adjustment
■ Aperture centering
Rev.: D
Amendment: /0
Issue Date:
December 2005
Micrel Semiconductor
ON Semiconductor
SY100EP195VTI
MC100EP195FA
SY100EP195VTITR
MC100EP195FAR2
CROSS REFERENCE TABLE
The SY100EP195V is a programmable delay line, varying
the time a logic signal takes to traverse from IN to Q. This
delay can vary from about 2.2ns to about 12.2ns. The input
can be PECL, LVPECL, NECL, or LVNECL.
The delay varies in discrete steps based on a control
word presented to SY100EP195V. The 10-bit width of this
latched control register allows for delay increments of
approximately 10ps.
An eleventh control bit allows the cascading of multiple
SY100EP195V devices, for a wider delay range. Each
additional SY100EP195V effectively doubles the delay range
available.
For maximum flexibility, the control register interface
accepts CMOS or TTL level signals, as well as the input
level at the IN± pins.
All support documentation can be found on Micrel’s web
site at: www.micrel.com.
TYPICAL APPLICATIONS CIRCUIT
TYPICAL PERFORMANCE
IN
CONTROL
LOGIC
Data Signal
of Unknown Phase
CLOCK+
CLOCK–
/IN
Q
/Q
D
CK
Q+
Q–
D[9:0]
SY100EP195V
Flip-Flop
0
2000
4000
6000
8000
10000
12000
0
200 400 600 800 1000 1200
DELAY
(ps)
TAP (DIGITAL WORD)
Delay vs. Tap
ECL Pro is a registered trademark of Micrel, Inc.
ECL Pro
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SY100EP195VTG TR | 功能描述:延遲線/計時元素 3.3V/5V 2.5 GHz Programmable Delay Line (I Temp, Green) RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| SY100EP195VTI | 功能描述:IC DELAY LINE 1024TAP 32-TQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 延遲線 系列:100EP, ECL Pro® 標準包裝:2,500 系列:- 標片/步級數:- 功能:多個，不可編程 延遲到第一抽頭:10ns 接頭增量:- 可用的總延遲:10ns 獨立延遲數:4 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SOIC 包裝:帶卷 (TR) |
| SY100EP195VTI TR | 功能描述:IC DELAY LINE 1024TAP 32-TQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 延遲線 系列:100EP, ECL Pro® 標準包裝:2,500 系列:- 標片/步級數:- 功能:多個，不可編程 延遲到第一抽頭:10ns 接頭增量:- 可用的總延遲:10ns 獨立延遲數:4 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SOIC 包裝:帶卷 (TR) |
| SY100EP196VTG | 功能描述:延遲線/計時元素 3.3V/5V 2.5 GHz Programmable Delay Line w/Fine Tune (I Temp, Green) RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| SY100EP196VTG TR | 功能描述:延遲線/計時元素 3.3V/5V 2.5 GHz Programmable Delay Line w/Fine Tune (I Temp, Green) RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
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