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參數(shù)資料
| 型號(hào)： | SY100EPT23LZC |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR |
| 中文描述： | DUAL PECL TO TTL TRANSLATOR, TRUE OUTPUT, PDSO8 |
| 封裝： | PLASTIC, SOIC-8 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大小： | 74K |
| 代理商： | SY100EPT23LZC |
Pin
Function
Q0, Q1
LVTTL Outputs
D0, /D0, D1, /D1
Differential LVPECL Inputs
V
CC
GND
Positive Supply
Ground
DESCRIPTION
I
3.3V power supply
I
1.9ns typical propagation delay
I
Maximum frequency > 275MHz
I
Differential LVPECL inputs
I
24mA LVTTL outputs
I
Flow-through pinouts
I
Internal input resistors: pulldown on D, pulldown
and pullup on /D
I
Q output will default LOW with inputs open or at
Ground
I
Available in 8-pin MSOP and SOIC packages
The SY100EPT23L is a dual differential LVPECL-to-
LVTTL translator. Because LVPECL (Low Voltage Positive
ECL) levels are used, only +3.3V and ground are required.
The tiny 8-pin MSOP and dual-gate design of the EPT23L
makes it ideal for applications which require the
translation of a clock and data signal.
The EPT23L is available in only the ECL 100K
standard. Since there are no LVPECL outputs or an
external V
BB
reference, the EPT23L does not require
both ECL standard versions. The inputs can accept 10K
voltage levels and any standard differential LVPECL input
referenced from a V
CC
of +3.3V
FEATURES
3.3V DUAL DIFFERENTIAL
LVPECL-to-LVTTL
TRANSLATOR
PIN NAMES
PIN CONFIGURATION/BLOCK DIAGRAM
1
D0
/D0
/D1
D1
8
V
CC
Q0
GND
7
6
5
2
3
4
Q1
LVPECL
LVTTL
(Available in 8-pin SOIC and 8-pin MSOP)
SY100EPT23L
1
Rev.: A
Issue Date:
Amendment: 1
July 2000
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SY100H603 | 9-BIT LATCHED ECL-TO-TTL |
| SY100H603JZ | 9-BIT LATCHED ECL-TO-TTL |
| SY100H603JZTR | 9-BIT LATCHED ECL-TO-TTL |
| SY10H603JZ | 9-BIT LATCHED ECL-TO-TTL |
| SY10H603JZTR | 9-BIT LATCHED ECL-TO-TTL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100EPT23LZC TR | 功能描述:IC TRANSLATOR DUAL 3.3V 8-SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:100EPT 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無(wú)/無(wú) 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應(yīng)商設(shè)備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
| SY100EPT23LZG | 功能描述:轉(zhuǎn)換 - 電壓電平 3.3V Dual Differential LVPECL-to-LVTTL Translator (I Temp, Green) RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SY100EPT23LZG TR | 功能描述:轉(zhuǎn)換 - 電壓電平 3.3V Dual Differential LVPECL-to-LVTTL Translator (I Temp, Green) RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| SY100EPT23LZI | 功能描述:IC TRANSLATOR DUAL 3.3V 8-SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:100EPT 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無(wú)/無(wú) 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應(yīng)商設(shè)備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
| SY100EPT23LZI TR | 功能描述:IC TRANSLATOR DUAL 3.3V 8-SOIC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:100EPT 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無(wú)/無(wú) 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應(yīng)商設(shè)備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
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