參數資料
| 型號： | SY89809ALTZ |
| 廠商： | Micrel Inc |
| 文件頁數： | 1/6頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:9 32-TQFP |
| 標準包裝： | 250 |
| 系列： | Precision Edge® |
| 類型： | 扇出緩沖器（分配），多路復用器 |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 2:9 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | HSTL，LVPECL |
| 輸出： | HSTL |
| 頻率 - 最大： | 750MHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應商設備封裝： | 32-TQFP |
| 包裝： | 托盤 |
| 其它名稱： | 576-3743 |
SY89809AL
3.3V LVPECL/HSTL to HSTL 1:9 High-
Performance Clock Driver with LVTTL
Clock Select and Enable
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (
408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
July 2010
M9999-070110
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY89809AL is a high-performance bus clock driver
with nine differential High-Speed Transceiver Logic (HSTL)
output pairs. The part is designed for use in low-voltage
(3.3V/1.8V) applications, which require a large number of
outputs to drive precisely aligned, ultra-low skew signals to
their destination. The input is multiplexed from either HSTL
or Low-Voltage Positive-Emitter-Coupled Logic (LVPECL)
by the CLK_SEL pin. The Output Enable (OE) is
synchronous
so
that
the
outputs
will
only
be
enabled/disabled when they are already in the LOW state.
This avoids any chance of generating a runt clock pulse
when the device is enabled/disabled as can happen with
an asynchronous control.
The SY89809AL features low pin-to-pin skew (15ps
typical) and low part-to-part skew (100ps typical). The
SY89809AL is available in a single space-saving package,
enabling a lower overall cost solution.
Datasheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Block Diagram
Precision Edge
Features
3.3V core supply, 1.8V output supply for reduced power
LVPECL and HSTL inputs
Nine differential HSTL (low-voltage swing) output pairs
HSTL outputs drive 50-to-ground with no offset voltage
750MHz maximum clock frequency
Low part-to-part skew (100ps typical)
Low pin-to-pin skew (15ps typical)
Available in 32-pin TQFP
Applications
High-performance PCs
Workstations
Parallel processor-based systems
Other high-performance computing
Communications
Level
Direction
Signal
HSTL
Input
HSTL_CLK, /HSTL_CLK
HSTL
Output
Q0 – Q8, /Q0 – /Q8
LVPECL
Input
LVPECL_CLK, /LVPECL_CLK
LVCMOS/LVTTL
Input
CLK_SEL, OE
Table 1. Signal Groups
OE
(1)
CLK_SEL
Q0 – Q8
/Q0 – /Q8
0
LOW
HIGH
0
1
LOW
HIGH
1
0
HSTL_CLK
/HSTL_CLK
1
LVPECL_CLK
/LVPECL_CLK
Table 2. Truth Table
Note:
1. The OE (output enable) signal is synchronized with the low level of
the HSTL_CLK and LVPECL_CLK signal.
相關PDF資料 |
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| SY89823LHI TR | IC CLK BUF MUX TRNSL 2:22 64TQFP |
| SY89824LHC TR | IC CLOCK BUFFER MUX 2:22 64-TQFP |
| SY89825UHI | IC CLK BUF MUX TRNSL 2:22 64TQFP |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SY89809ALTZ TR | 功能描述:緩沖器和線路驅動器 500MHz 1:9 Diff. HSTL Fanout Buffer (Green) RoHS:否 制造商:Micrel 輸入線路數量:1 輸出線路數量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SY89809L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1:9 HIGH-PERFORMANCE, LOW-VOLTAGE BUS CLOCK DRIVER |
| SY89809L_05 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1:9 HIGH-PERFORMANCE, LOW-VOLTAGE BUS CLOCK DRIVER |
| SY89809L_09 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1:9 High-Performance, Low-Voltage Bus Clock Driver |
| SY89809LTC | 功能描述:IC CLOCK BUFFER MUX 2:9 32-TQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:Precision Edge® 標準包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復用器 電路數:1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
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