參數資料
| 型號： | SY89809LTH |
| 廠商： | Micrel Inc |
| 文件頁數： | 1/8頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:9 32-TQFP |
| 標準包裝： | 250 |
| 系列： | Precision Edge® |
| 類型： | 扇出緩沖器（分配），多路復用器 |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 2:9 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | HSTL，LVPECL |
| 輸出： | HSTL |
| 頻率 - 最大： | 500MHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應商設備封裝： | 32-TQFP |
| 包裝： | 托盤 |
| 產品目錄頁面： | 1090 (CN2011-ZH PDF) |
| 其它名稱： | 576-2089 SY89809LTH-ND |
SY89809L
3.3V 1:9 High-Performance, Low-Voltage
Bus Clock Driver
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (
408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
December 2009
M9999-121409-D
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY89809L is a High-Performance Bus Clock Driver
with 9 differential HSTL (High-Speed Transceiver Logic)
output pairs. The part is designed for use in low-voltage
(3.3V/1.8V) applications, which require a large number of
outputs to drive precisely aligned, ultra-low skew signals to
their destination. The input is multiplexed from either HSTL
or LVPECL (Low-Voltage Positive-Emitter-Coupled Logic)
by the CLK_SEL pin. The Output Enable (OE) is
synchronous
so
that
the
outputs
will
only
be
enabled/disabled when they are already in the LOW state.
This avoids any chance of generating a runt clock pulse
when the device is enabled/disabled as can happen with
an asynchronous control.
The SY89809L features low pin-to-pin skew (50ps max.)
and low part-to-part skew (200ps max.)—performance
previously unachievable in a standard product having such
a high number of outputs. The SY89809L is available in a
single space saving package, enabling a lower overall cost
solution.
Datasheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Logic Symbol
Precision Edge
Features
3.3V core supply, 1.8V output supply for reduced power
LVPECL and HSTL inputs
9 differential HSTL (low-voltage swing) output pairs
HSTL outputs drive 50-to-ground with no offset voltage
500MHz maximum clock frequency
Low part-to-part skew (200ps max.)
Low pin-to-pin skew (50ps max.)
Available in 32-pin TQFP
Applications
High-performance PCs
Workstations
Parallel processor-based systems
Other high-performance computing
Communications
Level
Direction
Signal
HSTL
Input
HSTL_CLK, /HSTL_CLK
HSTL
Output
Q0 – Q8, /Q0 – /Q8
LVPECL
Input
LVPECL_CLK, /LVPECL_CLK
LVCMOS/LVTTL
Input
CLK_SEL, OE
Table 1. Signal Groups
OE
(1)
CLK_SEL
Q0 – Q8
/Q0 – /Q8
0
LOW
HIGH
0
1
LOW
HIGH
1
0
HSTL_CLK
/HSTL_CLK
1
LVPECL_CLK
/LVPECL_CLK
Table 2. Truth Table
Note:
1. The OE (output enable) signal is synchronized with the low level of
the HSTL_CLK and LVPECL_CLK signal.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SY89809LTH TR | 功能描述:時鐘緩沖器 500MHz 1:9 Diff. HSTL Fanout Buffer (Green) RoHS:否 制造商:Texas Instruments 輸出端數量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SY89809LTHTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1:9 HIGH-PERFORMANCE, LOW-VOLTAGE BUS CLOCK DRIVER |
| SY898225UH | 制造商:Synergy 功能描述: |
| SY89823L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 500MHz 1:22 DIFFERENTIAL HSTL (1.5V) FANOUT BUFFER/TRANSLATOR |
| SY89823L_08 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 500MHz 1:22 DIFFERENTIAL HSTL (1.5V) FANOUT BUFFER/TRANSLATOR |
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