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參數資料
型號: FAN5026MTCX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 穩壓器
英文描述: Dual DDR/Dual-output PWM Controller
中文描述: DUAL SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO28
封裝: 4.40 MM, MO-153AB, TSSOP-28
文件頁數: 3/17頁
文件大小: 192K
代理商: FAN5026MTCX
FAN5026
PRODUCT SPECIFICATION
REV. 1.0.2b 9/2/03
3
Pin Configurations
Pin Definitions
Pin
Number
1
Pin Name
AGND
Pin Function Description
Analog Ground
measured with respect to this pin.
Low-Side Drive
. The low-side (lower) MOSFET driver output. Connect to gate of
low-side MOSFET.
Power Ground
. The return for the low-side MOSFET driver. Connect to source of
low-side MOSFET.
Switching node
. Return for the high-side MOSFET driver and a current sense input.
Connect to source of high-side MOSFET and low-side MOSFET drain.
High-Side Drive
. High-side (upper) MOSFET driver output. Connect to gate of high-side
MOSFET.
BOOT
. Positive supply for the upper MOSFET driver. Connect as shown in Figure 3.
. This is the signal ground reference for the IC. All voltage levels are
2
27
3
26
4
25
5
24
6
23
7
22
8
21
LDRV1
LDRV2
PGND1
PGND2
SW1
SW2
HDRV1
BOOT1
BOOT2
ISNS1
ISNS2
EN1
EN2
Current Sense input
sense resistor for current feedback.
ENABLE
. Enables operation when pulled to logic high. Toggling EN will also reset the
regulator after a latched fault condition. These are CMOS inputs whose state is
indeterminate if left open.
Ground
. These pins should be tied to AGND for proper operation.
. Monitors the voltage drop across the lower MOSFET or external
9
20
10
19
11
12
17
13
GND
VSEN1
VSEN2
ILIM1
SS1
SS2
DDR
Output Voltage Sense
PG, under-voltage and over-voltage protection and monitoring.
Current Limit 1
. A resistor from this pin to GND sets the current limit.
Soft Start
. A capacitor from this pin to GND programs the slew rate of the converter
during initialization. During initialization, this pin is charged with a 5
DDR Mode Control
. High = DDR mode. Low = 2 separate regulators operating 180° out
of phase.
. The feedback from the outputs. Used for regulation as well as
μ
A current source.
AGND
LDRV1
PGND1
SW1
HDRV1
BOOT1
ISNS1
EN1
GND
VSEN1
ILIM1
SS1
DDR
VIN
FAN5026
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
LDRV2
PGND2
SW2
HDRV2
BOOT2
ISNS2
EN2
GND
VSEN2
ILIM2/REF2
SS2
PG2/REF2OUT
PG1
TSSOP-28
θ
JA
= 90°C/W
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