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參數資料
| 型號： | TC520ACOE |
| 廠商： | TelCom Semiconductor, Inc. |
| 英文描述： | SERIAL INTERFACE ADAPTER FOR TC500 A/D CONVERTER FAMILY |
| 中文描述： | 串行接口適配器TC500的A / D轉換器系列 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 81K |
| 代理商： | TC520ACOE |
3-39
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
TC520A
TC520A-1 9/16/96
B
LOAD
CMPTR
CMPTR
DV
DGND
CE
VDD
A
DIN
OSCOUT
DCLK
OSCIN
DOUT
READ
1
14
2
13
3
12
4
11
5
10
6
9
7
8
TC520ACPD
8
1
14
2
13
3
12
4
11
5
10
6
9
7
TC520ACOE
DIN
B
15
16
LOAD
DV
DGND
CE
VDD
DCLK
A
DOUT
OSCOUT
READ
OSCIN
N/C
N/C
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
LOGIC
CONTROL
GATE
8-BIT COUNTER
÷
256
8-BIT SHIFT REG.
8
÷
4
GATE
7
SYSCLK
6
A
B
CMPTR
CE
DV
5
4
3
14
13
GATE
TIME OUT
FORCE AUTO-ZERO
POLARITY BIT
CLEAR COUNT
1
2
VDD
GND
16-BIT COUNTER
18-BIT SHIFT REGISTER
GATE
OVERRANGE
BIT
11
12
9
10
8
READ
D
CLK
D
OUT
LOAD
D
IN
16
OSCIN
OSCOUT
Pin Out of
14-Pin Package
SERIAL INTERFACE ADAPTER FOR TC500 A/D CONVERTER FAMILY
FEATURES
I
I
Converts TC500/500A/510/514 to Serial Operation
Programmable Conversion Rate and Resolution
for Maximum Flexibility
Supports up to 17 Bits of Accuracy Plus
Polarity Bit
Low Power Operation: Typically 7.5mW
14-Pin DIP or 16-Pin SOIC Packages
Polled or Interrupt Mode Operation
I
I
I
I
ORDERING INFORMATION
Operating
Temp. Range
0
°
C to +70
°
C
0
°
C to +70
°
C
Part No.
Package
TC520ACOE
TC520ACPD
TC500EV
16-Pin SOIC (Wide)
14-Pin Plastic DIP
Evaluation Kit for TC500 Family
EVALUATION
KIT
AVAILABLE
GENERAL DESCRIPTION
The TC520A Serial Interface Adapter provides logic
control for TelCom's TC500/500A/510/514 family of dual
slope, integrating A/D converters. It directly manages TC500
converter phase control signals A, B, and CMPTR thereby
reducing host processor task loading and software complex-
ity. Communication with the TC520A is accomplished over
a 3 wire serial port. Key converter operating parameters are
programmable for complete user flexibility.
Data conversion initiated when the CE input is brought
low. The converted data (plus overrange and polarity bits)
are held in an 18 bit shift register until read by the processor,
or until the next conversion is completed. Data may be
clocked out of the TC520A at any time, and at any rate the
user prefers. A Data Valid (DV) output is driven active at the
start of each conversion cycle indicating the 18 bit shift
register update has just been completed. This signal may be
polled by the processor, or can be used as data ready
interrupt.
The TC520A timebase can be derived from an external
frequency source of up to 6MHz; or can operate from its own
external crystal. It requires a single 5V logic supply and
dissipates less than 7.5mW.
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