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參數資料
| 型號： | TDA8768BH/8/C3 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | ADC |
| 英文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, 1.30 MM LEAD LENGTH, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數： | 1/30頁 |
| 文件大小： | 547K |
| 代理商： | TDA8768BH/8/C3 |
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TDA8768B
12-bit, 80 Msps Analog-to-Digital Converter (ADC)
Rev. 02 — 20 January 2004
Product data
1.
Description
The TDA8768B is a biCMOS 12-bit Analog-to-Digital Converter (ADC) optimized for
EDGE and W-CDMA cellular infrastructures, professional telecommunications and
other applications such as advanced FM radio and professional imaging. Its main
innovation is the RF sampling, based on high-speed clock (up to 80 Msps) combined
with a high input frequency (up to 176 MHz). It converts the analog input signal into
12-bit binary coded digital words at a maximum sampling rate of 80 MHz. All static
digital inputs (SH, CE and OTC) are TTL and CMOS compatible and all outputs are
CMOS compatible. A sine wave clock input signal can also be used.
2.
Features
s 12-bit resolution
s Sampling rate up to 80 MHz:
x 52 Msps at fIF = 175 MHz; B = 200 kHz (TDA8768BH/5):
SFDR=83dB, S/N=71dB
x 80 Msps at fIF = 20 MHz; Nyquist bandwidth (TDA8768BH/8):
SFDR=65dB, S/N=62dB
x 80 Msps at fIF = 50 MHz; B = 5 MHz (TDA8768BH/8/S1):
SFDR=72dB, S/N=64dB
s
3 dB bandwidth of 250 MHz
s 5 V power supplies and 3.3 V output power supply
s Binary or twos complement CMOS outputs
s In-range CMOS compatible output
s TTL and CMOS compatible static digital inputs
s TTL and CMOS compatible digital outputs
s Single or differential clock input; TTL and CMOS compatible
s Power dissipation 570 mW (typical)
s Low analog input capacitance (typical 2 pF), no buffer amplier required
s Integrated sample-and-hold amplier
s Differential analog input
s External amplitude range control
s Voltage controlled regulator included
s Ambient temperature from
40 °C to +85 °C.
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