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參數資料
型號: TFA9812HN/N1,518
廠商: NXP SEMICONDUCTORS
元件分類: 音頻/視頻放大
英文描述: 15 W, 2 CHANNEL, AUDIO AMPLIFIER, PQCC48
封裝: 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT619-8, HVQFN-48
文件頁數: 17/66頁
文件大小: 386K
代理商: TFA9812HN/N1,518
TFA9812_2
NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 02 — 22 January 2009
24 of 66
NXP Semiconductors
TFA9812
BTL stereo Class-D audio amplier with I2S input
8.7.1 Thermal foldback
If the junction temperature of the TFA9812 exceeds the programmable Thermal foldback
threshold temperature the gain of the amplier is decreased gradually to a level where the
combination of dissipation (P) and the thermal resistance from junction to ambient (Rth(j-a))
results in a junction temperature around the threshold temperature.
This means that the device will not completely switch off, but remains operational at lower
output power levels. Especially with music output signals this feature enables high peak
output power while still operating without any external heat sink other than the
printed-circuit board area. If the junction temperature still increases due to external
causes, the OTP switches the amplier to 3-state mode.
Under I2C control the Thermal foldback threshold temperature value can be lowered
(see Section 9.5.8): In Legacy control mode the default threshold value of 125
°C is xed.
8.7.2 Overtemperature protection
This is a ‘hard’ protection to prevent heat damage to the TFA9812. The overtemperature
threshold level is the 160
°C junction temperature.
When the threshold temperature is exceeded the output stages are set to 3-state mode.
The temperature is then checked at 1
s intervals and the output stages will operate
normally again once the temperature has dropped below the threshold level.
OTP is agged by a low DIAG pin. The TFA9812 temperature is an I2C reading, see
Under normal conditions thermal foldback prevents the overtemperature protection from
being triggered.
8.7.3 Overcurrent protection
The output current of the power ampliers is current-limited. When an output stage
exceeds a current of 3 A typical, the output stages are set to 3-state mode and after 1
s
the stages will start operating normally again. These interruptions are not audible.
OCP is agged by a low DIAG pin and by a high DIAG I2C status bit, see Section 9.5.10.
I2C settings remain valid.
8.7.4 Overvoltage protection
The supply for the power stages (VDDA, VDDP) is protected against overvoltage. When a
supply voltage exceeds 20 V the device will enter Sleep mode. When the supply voltage
has fallen below 20 V again the power-up sequence is started.
OVP is agged by a low DIAG pin and by a high DIAG I2C status bit, see Section 9.5.10.
I2C settings remain valid.
8.7.5 Undervoltage protections
The supplies are protected against undervoltage. When this is detected the device will
enter Sleep mode. When the supply voltage has risen to a sufcient level again the
power-up sequence is started.
Table 20 shows the UVP trigger levels for the VDDA and VDDA(3V3) supplies:
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