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參數(shù)資料
| 型號： | THS0842IPFB |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| 封裝： | GREEN, PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 17/30頁 |
| 文件大小： | 503K |
| 代理商： | THS0842IPFB |
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THS0842
DUAL-INPUT, 8-BIT, 40 MSPS LOW-POWER ANALOG-TO-DIGITAL CONVERTER
WITH SINGLE OR DUAL PARALLEL BUS OUTPUT
SLAS246A – DECEMBER 1999 – REVISED AUGUST 2000
24
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
dc coupled input
C
THS0842
+
–
CML
R
AIN+
R
VIN
AIN–
REFT
REFB
C
THS0842
CML
AIN–
VIN
AIN+
REFT
REFB
(a)
(b)
Figure 24. DC-Coupled Input Circuits
For dc-coupled systems, an op-amp can level shift a ground referenced input signal. A circuit like Figure 24(b)
could be used. In this case, the AIN voltage is given by: AIN = –VIN + VCML
reference terminals
The THS0842 input voltage range is determined by the voltages on terminals REFBI and REFTI. Since the
device has an internal voltage reference generator, it must be placed in power down before applying an external
voltage to the REFT and REFB pins. Especially at higher sampling rates, it is advantageous to have a wider
analog input range. This can be achievable by using external voltage references (e.g., at AVDD = 3.3 V, the full
scale range can be extended from 1 Vpp (internal reference) to 1.3 Vpp (external reference) as shown in Table 1).
These voltages should not be derived via a voltage divider from a power supply source. Instead, use a
bandgap-derived voltage reference to derive both references via an op-amp circuit. Refer to the schematic of
the THS0842 evaluation module in this datasheet for an example circuit.
When using external references, the full-scale ADC input range and its dc position can be adjusted. The
full-scale ADC range is always equal to VREFT – VREFB. The maximum full-scale range is dependent on AVDD
as shown in the specification section. Next to the constraint on their difference, there are limitations on the useful
range of VREFT and VREFB individually as well, dependent also on AVDD.
Table 1 summarizes these limits for 3 cases.
Table 1. Min/Max Reference Input Levels
AVDD
VREFB(min)
VREFB(max)
VREFT(min)
VREFT(max)
[VREFT–VREFB]max
3 V
0.8 V
1.2 V
1.8 V
2.2 V
1 V
3.3 V
0.8 V
1.2 V
2.1 V
2.5 V
1.3 V
3.6 V
0.8 V
1.2 V
2.4 V
2.8 V
1.6 V
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THS0842IPFBG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 40MSPS Dual Ch RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS0842PFB | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL-INPUT, 8-BIT, 40 MSPS LOW-POWER ANALOG-TO-DIGITAL CONVERTER WITH SINGLE OR DUAL PARALLEL BUS OUTPUT |
| THS10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EURO TERMINAL BLOCKS |
| THS10064 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER |
| THS10064CDA | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 6 MSPS Quad Ch DSP/uP Ifc RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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