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參數資料
| 型號： | THS1031IDW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | GREEN, PLASTIC, SOIC-28 |
| 文件頁數： | 28/41頁 |
| 文件大小： | 728K |
| 代理商： | THS1031IDW |
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THS1031
3-V TO 5.5-V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002
34
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
clamp operation (continued)
Thus if a constant voltage is applied to the clamp input that drives the ADC output to code 1023 (with no
over-range), then the ADC output code will slowly drop to code 1022, or possibly code 1021, over the period
td.
If the calculated droop is greater than can be tolerated in the application then increase CIN to slow the droop
and hence reduce the voltage change between clamp pulses.
If a high leakage capacitor is used for coupling the input source to the AIN pin then the droop may be significantly
larger than calculated above due to the capacitor’s rapid rate of self-discharge. Avoid using electrolytic and
tantalum coupling capacitors as these usually exhibit much higher leakage then nonpolarized capacitor types.
Electrolytic and tantalum capacitors also tend to have higher parasitics inductance, which can cause further
problems at high input frequencies.
steady-state clamp voltage error
Under steady-state conditions, the change in the clamp voltage caused during clamping must equal the change
caused by clamp droop, otherwise the effect causing the largest voltage change would pull the clamp voltage
away until these charging and droop effects equalize.
Figure 40 shows the approximate voltage waveform at AIN resulting from clamp droop during td and clamp
voltage reacquisition during the clamp pulse time, tc.
V
COS
VDROOP = VAIN
tc
td
V(Clamp)
VAIN
VM
Figure 40. Approximate Waveforms at AIN During Droop and Clamping
The voltage change at AIN during acquisition has been approximated as a linear charging ramp by assuming
that almost all of VCOS appears across RIN, giving a charging current VCOS/Rin (this is a reasonable
approximation when VCOS is large enough to be a problem). The voltage change at AIN during clamp acquisition
is then
DV
AIN +
V
COS
R
IN
tc
The peak-to-peak voltage variation at AIN must equal the clamp droop voltage at steady state. Equating the
droop voltage to the clamp acquisition voltage change gives
V
COS +
R
IN
I
IN
td
tc
Where IIN is the input current given by equation, thus for low offset voltage, keep RIN low and ensure that the
ratio td/tc is not unreasonably large.
(24)
(25)
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相關代理商/技術參數 |
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| THS1031IDWG4 | 功能描述:模數轉換器 - ADC 10-Bit 30 MSPS 1-Ch RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1031IDWR | 功能描述:模數轉換器 - ADC 10-Bit 30 MSPS 1-Ch RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1031IDWRG4 | 功能描述:模數轉換器 - ADC 10-Bit 30 MSPS 1-Ch RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1031IPW | 功能描述:模數轉換器 - ADC _ RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1031IPWG4 | 功能描述:模數轉換器 - ADC 10B 30 MSPS ADC Sgl Ch. Integ. Pgmable RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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