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參數資料
| 型號： | THS1031IPWR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | GREEN, PLASTIC, TSSOP-28 |
| 文件頁數： | 26/41頁 |
| 文件大小： | 728K |
| 代理商： | THS1031IPWR |
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THS1031
3-V TO 5.5-V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002
32
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
driving REFTF and REFBF (full external reference mode)
AVDD
AGND
AVDD
AGND
680
To REFBS
(For Kelvin Connection)
To REFTS
(For Kelvin Connection)
REFTF
REFBF
Figure 38. Equivalent Circuit of REFTF and REFBF Inputs
Note the need for off-chip decoupling.
clamp operation
The clamp voltage output level may be established by an analog voltage on the CLAMPIN pin or by
programming the on-chip clamp DAC.
clamp acquisition time
Figure 39 shows the basic operation of the clamp circuit with the analog input AIN coupled via an RC circuit.
10-Bit
DAC
_
+
CLAMPIN
CLAMP
AIN
RIN
CIN
VCLAMP
Control Register
S/H
VIN
SW1
Figure 39. Schematic of Clamp Circuitry
After powerup, the clamp circuit requires SW1 to be closed to charge the coupling capacitor, CIN, to the voltage
required to set the dc clamp level at AIN. The charging time required to set the correct clamp voltage is called
the clamp acquisition time, tACQ:
t
ACQ +
C
IN
R
IN
In
Vc
Ve
Vc is the difference between the dc bias voltage level of the input signal, VIN, and the target clamp output voltage,
V(clamp). Ve is the difference between the ideal Vc and the actual Vc obtained during the acquisition time. The
maximum tolerable error depends on the application requirements.
(19)
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| THS1031IPWRG4 | 功能描述:模數轉換器 - ADC 10-Bit 30 MSPS 1-Ch RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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| THS1031TSSOP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V . 5.5 V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER |
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