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參數資料
型號: THS1207IDAR
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
封裝: GREEN, PLASTIC, TSSOP-32
文件頁數: 20/32頁
文件大?。?/td> 317K
代理商: THS1207IDAR
THS1207
SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002
www.ti.com
27
ANALOG INPUT CONFIGURATION AND REFERENCE VOLTAGE
The THS1207 features four analog input channels. These can be configured for either single-ended or
differential operation. Figure 36 shows a simplified model, where a single-ended configuration for channel AINP
is selected. The reference voltages for the ADC itself are VREFP and VREFM (either internal or external reference
voltages). The analog input voltage range is between VREFM to VREFP. This means that VREFM defines the
minimum voltage, and VREFP defines the maximum voltage, which can be applied to the ADC. The internal
reference source provides the voltage VREFM of 1.5 V and the voltage VREFP of 3.5 V (see also section
reference voltage). The resulting analog input voltage swing of 2 V can be expressed by:
V
REFM v
AINP
v V
REFP
12-Bit
ADC
VREFP
VREFM
AINP
Figure 36. Single-Ended Input Stage
A differential operation is desired in many applications due to a better signal-to-noise ration. Figure 37 shows
a simplified model for the analog inputs AINM and AINP, which are configured for differential operation. The
differential operation mode provides in terms of performance benefits over single-ended mode and is therefore
recommended for best performance. The THS1207 offers 2 differential analog inputs and in the single-ended
mode 4 analog inputs. If the analog input architecture is differential, common mode noise and common mode
voltages can be rejected. Additional details for both modes are given below.
12-Bit
ADC
VREFP
VREFM
AINP
Σ
VADC
AINM
+
Figure 37. Differential Input Stage
In comparison to the single-ended configuration it can be seen that the voltage, VADC, which is applied at the
input of the ADC is the difference between the input AINP and AINM. The voltage VADC can be calculated as
follows:
V
ADC +
ABS(AINP–AINM)
The advantage to single-ended operation is that the common-mode voltage
V
CM +
AINM
) AINP
2
can be rejected in the differential configuration, if the following condition for the analog input voltages is true:
AGND
v AINM, AINP v AV
DD
1V
v V
CM v
4V
(1)
(2)
(3)
(4)
(5)
相關PDF資料
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THS1207IDAG4 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
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相關代理商/技術參數
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