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參數資料
| 型號： | THS1215CDWG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | GREEN, PLASTIC, SOIC-28 |
| 文件頁數： | 7/22頁 |
| 文件大小： | 391K |
| 代理商： | THS1215CDWG4 |
www.ti.com
Digital Outputs
THS1215
DA11
DA0
SN74ALVCH16841
12
1D9
1D0
2D7
2D2
LE
OE
1Q9
1Q0
2Q9
2Q2
12
ASIC
or
DSP
2D1
2D0
2Q1
2Q0
FIFO
D11
D0
1Q15
1Q0
16
DSP
WRTCLK
HF flag
INTR
D15
D12
THS1215
DA11
DA0
12
15 MHz
Clock
CLK
Layout, Decoupling, and Grounding Rules
THS1215
SLAS292A – MARCH 2001 – REVISED MARCH 2004
The output of THS1215 is in unsigned binary code. The ADC input over-range indicator is output on pin OVRNG.
Capacitive loading on the output should be kept as low as possible (a maximum loading of 10 pF is
recommended) to ensure best performance. Higher output loading causes higher dynamic output currents and
can therefore increase noise coupling into the part's analog front-end. To drive higher loads, the use of an output
buffer is recommended.
When clocking output data from THS1215, it is important to observe its timing relation to CLK. The pipeline ADC
delay is 5 clock cycles to which the maximum output propagation delay needs to be added.
Figure 20. Buffered Output Connection
Figure 21. FIFO Connection
Proper grounding and layout of the PCB on which THS1215 is populated is essential to achieve the stated
performance. It is advised to use separate analog and digital ground planes that are spliced underneath the IC.
THS1215 has digital and analog pins on opposite sides of the package to make this easier. Because there is no
connection internally between analog and digital grounds, they have to be joined on the PCB. It is advised to do
this at one point in close proximity to THS1215.
Because of the high sampling rate and switched-capacitor architecture, THS1215 generates transients on the
supply and reference lines. Proper decoupling of these lines is therefore essential. EVM decoupling is
recommended as shown in Figure 22.
15
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| THS1215IPWG4 | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
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| THS1215IPWRG4 | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| THS1215CDWR | 功能描述:模數轉換器 - ADC 12-Bit 15 MSPS w/Low Pwr & exc ENOB RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1215CDWRG4 | 功能描述:模數轉換器 - ADC 12-Bit 15 MSPS w/Low Pwr & exc ENOB RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1215CPW | 功能描述:模數轉換器 - ADC 12bit 15MSPS ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1215CPWG4 | 功能描述:模數轉換器 - ADC 12bit 15MSPS ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS1215CPWR | 功能描述:模數轉換器 - ADC 12-Bit 15 MSPS w/Low Pwr & exc ENOB RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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