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參數資料
型號: THS4601IDR
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: 1 CHANNEL, VIDEO AMPLIFIER, PDSO8
封裝: GREEN, PLASTIC, MS-012AA, SOIC-8
文件頁數: 10/34頁
文件大小: 826K
代理商: THS4601IDR
THS4601
SLOS388B OCTOBER 2001 REVISED JUNE 2002
18
www.ti.com
APPLICATION INFORMATION
alternative transimpedance configurations (continued)
The third configuration uses a capacitive T-network to achieve fine control of the compensation capacitance.
The capacitor CF3 can be used to tune the total effective feedback capacitance to a very fine degree. This circuit
behaves the same as the basic transimpedance configuration, with the effective CF given by equation 4.
1
C
FEQ
+ 1
C
F1
1
)
C
F3
C
F2
_
+
CF2
RL
RF
VBias
CF1
CF3
NOTE: A capacitive T-network enables fine control of the effective
feedback capacitance using relatively large capacitor values.
λ
Figure 35. Alternative Transimpedance Configuration #3
summary of key decisions in transimpedance design
The following is a quick, simplified process for basic transimpedance circuit design. This process gives a quick
start to the design process, though it does ignore some aspects that may be critical to the circuit.
Step 1:
Determine the capacitance of the source.
Step 2:
Calculate the total source capacitance, including the amplifier input capacitance, CICM and CIDIFF.
Step 3:
Determine the magnitude of the possible current output from the source, including the minimum
signal current anticipated and maximum signal current anticipated.
Step 4:
Choose a feedback resistor value such that the input current levels create the desired output signal
voltages, and ensure that the output voltages can accommodate the dynamic range of the input
signal.
Step 5:
Calculate the optimum feedback capacitance using equation 1.
Step 6:
Calculate the bandwidth given the resulting component values.
Step 7:
Evaluate the circuit to see if all design goals are satisfied.
(4)
相關PDF資料
PDF描述
THS4601ID 1 CHANNEL, VIDEO AMPLIFIER, PDSO8
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THS5641AIDW PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28
THS5641AIPW PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28
相關代理商/技術參數
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