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參數資料
型號: THS770012IRGET
廠商: TEXAS INSTRUMENTS INC
元件分類: 模擬信號調理
英文描述: SPECIALTY ANALOG CIRCUIT, PQCC24
封裝: GREEN, PLASTIC, VQFN-24
文件頁數: 6/35頁
文件大小: 1305K
代理商: THS770012IRGET
SLOS669B
– FEBRUARY 2010 – REVISED MAY 2011
TEST CIRCUITS
OVERVIEW
The standard THS770012 evaluation module (EVM) is used for testing the typical performance shown in the
Typical Characteristics, with changes as noted below. The EVM schematic is shown in Figure 37. The signal
generators and analyzers used for most tests have single-ended 50
input and output impedance. The
THS770012 EVM is configured to convert to and from a single-ended 50
impedance by using RF transformers
or baluns 1:1 (CX2156NL from Pulse, supplied as a standard configuration of the EVM) to allow easy connection
to standard lab equipment. For line input termination, two 49.9
resistors (R5 and R6) are placed to ground on
the input transformer output pins (terminals 1 and 3). In combination with the 100
input impedance of the
device, the total impedance seen by the line is 50
.
Gain is set by placing external components R11, R12, R13, and R14 as described below in Setting the Gain
section.
A resistor network is used on the amplifier output to present various loads (RL) and maintain line output
termination to 50
. Depending on the test conditions, component values are changed as shown in Table 1, or as
otherwise noted. As a result of the voltage divider on the output formed by the load component values, the
amplifier output is attenuated. The Loss column in Table 1 shows the attenuation expected from the resistor
divider. The output transformer causes slightly more loss, so these numbers are approximate.
Table 1. Load Component Values(1)
LOAD RL
R15 AND R17
R16
LOSS
100
Ω
25
Ω
Open
6dB
200
Ω
86.6
Ω
69.8
Ω
16.8dB
400
Ω
187
Ω
57.6
Ω
25.5dB
1k
Ω
487
Ω
52.3
Ω
31.8dB
(1)
The total load includes 50
termination by the test equipment. Components are chosen to achieve load and 50 line termination
through a 1:1 transformer.
14
Copyright
2010–2011, Texas Instruments Incorporated
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