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參數(shù)資料
| 型號： | TLC3578IPWRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | GREEN, PLASTIC, TSSOP-24 |
| 文件頁數(shù)： | 25/49頁 |
| 文件大?。?/td> | 1137K |
| 代理商： | TLC3578IPWRG4 |
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TLC3574, TLC3578, TLC2574, TLC2578
5V ANALOG, 3/5V DIGITAL, 14/12BIT, 200KSPS, 4/8CHANNEL
SERIAL ANALOGTODIGITAL CONVERTERS WITH ±10V INPUTS
SLAS262C OCTOBER 2000 REVISED MAY 2003
31
WWW.TI.COM
conversion operation (continued)
CS
FS
SDI
INT
SDO
***
Command = Configure Write for Mode 11, FIFO
Threshold = 1/2 Full, Sweep Sequence: 0022
**
COMMAND = Select Any Channel
*
COMMAND = Read FIFO
*
Configure
Conversion
From CH0
Conversion
From CH2
Conversion
From CH2
Conversion
From CH0
1st SWEEP
1st FIFO Read
REPEAT
2nd FIFO Read
CH0
CH2
CH0
READ FIFO after 1st SWEEP Completed
CSTART
*** **
**
*
***
*
Possible Signal
Don’t Care
Figure 19. Mode 11, CSTART Triggers Samplings/Conversions, FS Initiates SELECT Operation
conversion clock and conversion speed
The conversion clock source can be the internal OSC, or the external clock, SCLK. The conversion clock is equal
to the internal OSC if the internal clock is used, or equal to SCLK/4 when the external clock is selected. It takes
18 conversion clocks plus 15 ns to finish the conversion for TLC3574 and TLC3578, and 13 conversion clocks
plus 15 ns for the TLC2574 and TLC2578. If the external clock is selected, the conversion time (not including
sampling time) is 18X(4/fSCLK)+15 ns for TLC3574 and TLC3578 and 13X(4/fSCLK)+15 ns for TLC2574 and
TLC2578. Table 4 shows the maximum conversion rate (including sampling time) when the analog input source
resistor is 25
.
Table 4. Maximum Conversion Rate
DEVICE
SAMPLING MODE
CONVERSION CLK
MAX SCLK
(MHz)
CONVERSION
TIME (
s)
RATE
(KSPS)
SHORT (16 SCLK)
External
SCLK/4
10
8.815
113.4
TLC3574/78
LONG (48 SCLK)
External
SCLK/4
25
4.815
207.7
TLC3574/78
(Rs = 25
)
SHORT (16 SCLK)
Internal
6.5 MHz
10
4.384
228.0
(Rs = 25
)
LONG (48 SCLK)
Internal
6.5 MHz
25
4.705
212.5
SHORT (16 SCLK)
Exernal
SCLK/4
10
6.815
146.7
TLC2574/78
LONG (48 SCLK)
External
SCLK/4
25
4.015
249.1
TLC2574/78
(Rs = 25
)
SHORT (16 SCLK)
Internal
6.5 MHz
10
3.615
276.6
(Rs = 25
)
LONG (48 SCLK)
Internal
6.5 MHz
25
3.935
254.1
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PDF描述 |
|---|---|
| TLC3578IPWR | 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| TLC3574IPWG4 | 4-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| TLC2574IPWG4 | 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| TLC3578IDWR | 8-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| TLC2574IDW | 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
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