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參數資料
| 型號： | TLC540IDW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 11-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | GREEN, PLASTIC, SOIC-20 |
| 文件頁數： | 10/16頁 |
| 文件大小： | 296K |
| 代理商： | TLC540IDW |
TLC540I, TLC541I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 INPUTS
SLAS065B – OCTOBER 1983 – REVISED JUNE 2001
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
operating sequence
ADDRESS
INPUT
Hi-Z
B7
B0
B1
B2
B3
B4
B5
B6
B7
C3 C2
C1
C0
LSB
MSB
Conversion Data B
MSB
LSB
Hi-Z State
Don’t Care
MSB
LSB
MSB
(See Note B)
A7
A6 A5
A4 A3
A2
A1
A0
State
LSB
B0
B1
B2
MSB
B3
Don’t
Care
1
Sample
Cycle C
Access
Cycle C
See Note A
tconv
Sample
Cycle B
Access
Cycle B
(see Note C)
88
7
6
5
4
3
2
7
6
5
4
3
2
I/O
CLOCK
CS
DATA
OUT
Don’t Care
twH(CS)
Previous Conversion Data A
NOTES: A. The conversion cycle, which requires 36 system clock periods, is initiated on the 8th falling edge of I/O CLOCK after CS goes low
for the channel whose address exists in memory at that time. If CS is kept low during conversion, I/O CLOCK must remain low
for at least 36 system clock cycles to allow conversion to be completed.
B. The most significant bit (MSB) will automatically be placed on the DATA OUT bus after CS is brought low. The remaining seven
bits (A6 – A0) will be clocked out on the first seven I/O CLOCK falling edges.
C. To minimize errors caused by noise at CS, the internal circuitry waits for three system clock cycles (or less) after a chip select
falling edge is detected before responding to control input signals. Therefore, no attempt should be made to clock-in address data
until the minimum chip-select setup time has elapsed.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1)
6.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (any input)
– 0.3 V to VCC +0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO
– 0.3 V to VCC +0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak input current range (any input)
±10 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak total input current (all inputs)
±30 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: TLC540I, TLC541I
– 40
°C to 85°C
. . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
– 65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 10 seconds: FN package
260
°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package
260
°C
. . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to digital ground with REF– and GND wired together (unless otherwise noted).
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