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參數資料
型號: TLC5510IPWR
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24
封裝: GREEN, PLASTIC, TSSOP-24
文件頁數: 20/21頁
文件大小: 500K
代理商: TLC5510IPWR
TLC5510, TLC5510A
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS
SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
functional operation
The output code change with input voltage is shown in Table 1.
Table 1. Functional Operation
INPUT SIGNAL
STEP
DIGITAL OUTPUT CODE
INPUT SIGNAL
VOLTAGE
STEP
MSB
LSB
Vref(B)
255
0
128
0
11
1
127
1
00
0
Vref(T)
0
1
APPLICATION INFORMATION
The following notes are design recommendations that should be used with the device.
D External analog and digital circuitry should be physically separated and shielded as much as possible to
reduce system noise.
D RF breadboarding or printed-circuit-board (PCB) techniques should be used throughout the evaluation and
production process. Breadboards should be copper clad for bench evaluation.
D Since AGND and DGND are connected internally, the ground lead in must be kept as noise free as possible.
A good method to use is twisted-pair cables for the supply lines to minimize noise pickup. An analog and
digital ground plane should be used on PCB layouts when additional logic devices are used. The AGND
and DGND terminals of the device should be tied to the analog ground plane.
D VDDA to AGND and VDDD to DGND should be decoupled with 1-F and 0.01-F capacitors, respectively,
and placed as close as possible to the affected device terminals. A ceramic-chip capacitor is recommended
for the 0.01-
F capacitor. Care should be exercised to ensure a solid noise-free ground connection for the
analog and digital ground terminals.
D VDDA, AGND, and ANALOG IN should be shielded from the higher frequency terminals, CLK and D0–D7.
When possible, AGND traces should be placed on both sides of the ANALOG IN traces on the PCB for
shielding.
D In testing or application of the device, the resistance of the driving source connected to the analog input
should be 10
or less within the analog frequency range of interest.
相關PDF資料
PDF描述
TLC5510AINSRG4 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24
TLC5510IPWRG4 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24
TLC5510INSLE 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24
TLC5510IPWG4 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24
TLC5510AINSG4 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24
相關代理商/技術參數
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