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參數(shù)資料
| 型號： | TLC5540CNSLE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDSO24 |
| 封裝： | PLASTIC, SOP-24 |
| 文件頁數(shù)： | 4/21頁 |
| 文件大小： | 407K |
| 代理商： | TLC5540CNSLE |
TLC5540
SLAS105D JANUARY 1995 REVISED APRIL 2004
www.ti.com
12
PRINCIPLES OF OPERATION
functional description (continued)
The MSB comparator block converts on the falling edge of each applied clock cycle. The LSB comparator blocks
CB-A and CB-B convert on the falling edges of the first and second following clock cycles, respectively. The
timing diagram of the conversion algorithm is shown in Figure 12.
analog input operation
The analog input stage to the TLC5540 is a chopper-stabilized comparator and is equivalently shown below:
VDDA
ANALOG IN
S1
Vref(N)
φ1
φ2
S3
φ1
Cs
To Encoder Logic
φ2
S2
φ1
Cs
To Encoder Logic
φ2
S(N)
φ1
Cs
To Encoder Logic
Figure 13. External Connections for Using the Internal Reference Resistor Divider
Figure 13 depicts the analog input for the TLC5540. The switches shown are controlled by two internal clocks,
φ1 and φ2. These are nonoverlapping clocks that are generated from the CLK input. During the sampling period,
φ1, S1 is closed and the input signal is applied to one side of the sampling capacitor, Cs. Also during the sampling
period, S2 through S(N) are closed. This sets the comparator input to approximately 2.5 V. The delta voltage
is developed across Cs. During the comparison phase, φ2, S1 is switched to the appropriate reference voltage
for the bit value N. S2 is opened and Vref(N) VCs toggles the comparator output to the appropriate digital 1 or
0. The small resistance values for the switch, S1, and small value of the sampling capacitor combine to produce
the wide analog input bandwidth of the TLC5540. The source impedance driving the analog input of the
TLC5540 should be less than 100
across the range of input frequency spectrum.
reference inputs REFB, REFT, REFBS, REFTS
The range of analog inputs that can be converted are determined by REFB and REFT, REFT being the
maximum reference voltage and REFB being the minimum reference voltage. The TLC5540 is tested with
REFT = 2.6 V and REFB = 0.6 V producing a 2-V full-scale range. The TLC5540 can operate with
REFT REFB = 5 V, but the power dissipation in the reference resistor increases significantly (93 mW
nominally). It is recommended that a 0.1
F capacitor be attached to REFB and REFT whether using externally
or internally generated voltages.
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| TLC5540CPW | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 40 MSPS 1-Ch Internal S&H Lo Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLC5540CPWG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 40 MSPS 1-Ch Internal S&H Lo Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLC5540CPWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 40 MSPS 1-Ch Internal S&H Lo Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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