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參數資料
型號: TLC5602CDWRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, PDSO20
封裝: GREEN, PLASTIC, SOIC-20
文件頁數: 11/12頁
文件大?。?/td> 242K
代理商: TLC5602CDWRG4
TLC5602C, TLC5602M
VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS023D – FEBRUARY 1989 – REVISED JANUARY 2002
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
The following design recommendations benefit the TLC5602 user:
D Physically separate and shield external analog and digital circuitry as much as possible to reduce system
noise.
D Use RF breadboarding or RF printed-circuit-board (PCB) techniques throughout the evaluation and
production process.
D Since ANLG GND and DGTL GND are not connected internally, these terminals need to be connected
externally. With breadboards, these ground lines should connect to the power-supply ground through
separate leads with proper supply bypassing. A good method is to use a separate twisted pair for the analog
and digital supply lines to minimize noise pickup.
Use wide ground leads or a ground plane on the PCB layouts to minimize parasitic inductance and
resistance. The ground plane is the better choice for noise reduction.
D ANLG VDD and DGTL VDD are also separated internally, so they must connect externally. These external
PCB leads should also be made as wide as possible. Place a ferrite bead or equivalent inductance in series
with ANLG VDD and the decoupling capacitor as close to the device terminals as possible before the ANLG
VDD and DGTL VDD leads are connected together on the board.
D Decouple ANLG VDD to ANLG GND and DGTL VDD to DGTL GND with a 1-F and 0.01-F capacitor,
respectively, as close as possible to the appropriate device terminals. A ceramic chip capacitor is
recommended for the 0.01-
F capacitor.
D Connect the phase compensation capacitor between COMP and ANLG GND with as short a lead-in as
possible.
D The no-connection (NC) terminals on the small-outline package should be connected to ANLG GND.
D Shield ANLG VDD, ANLG GND, and A OUT from the high-frequency terminals CLK and D7–D0. Place
ANLG GND traces on both sides of the A OUT trace on the PCB.
相關PDF資料
PDF描述
TLC5602CDWR PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, PDSO20
TLC5602CN PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, PDIP18
TLC5602MFK PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, CQCC20
TLC5602MJ PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, CDIP20
TLC5602MJB PARALLEL, 8 BITS INPUT LOADING, 0.03 us SETTLING TIME, 8-BIT DAC, CDIP20
相關代理商/技術參數
參數描述
TLC5602CN 制造商:Rochester Electronics LLC 功能描述:- Bulk
TLC5602M 制造商:TI 制造商全稱:Texas Instruments 功能描述:VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS
TLC5602MFK 制造商:TI 制造商全稱:Texas Instruments 功能描述:VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS
TLC5602MJ 制造商:TI 制造商全稱:Texas Instruments 功能描述:VIDEO 8-BIT DIGITAL-TO-ANALOG CONVERTERS
TLC5615 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT DIGITAL-TO-ANALOG CONVERTERS
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