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參數資料
型號: TLC7225IDW
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO24
封裝: 0.300 INCH, GREEN, SOIC-24
文件頁數: 21/22頁
文件大小: 331K
代理商: TLC7225IDW
TLC7225C, TLC7225I
QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
specification ranges
For the TLC7225 to operate to rated specifications, the input reference voltage must be at least 4 V below the
power supply voltage at the VDD terminal. This voltage differential is the overhead voltage required by the output
amplifiers.
The TLC7225 is specified to operate over a VDD range from 12 V ± 5% to 15 V ± 10% (i.e., from 11.4 V to 16.5 V)
with a VSS of – 5 V ± 10%. Operation is also specified for a single supply with a VDD of 15 V ± 5%. Applying a
VSS of – 5 V results in improved zero-code error, improved output sink capability with outputs near AGND, and
improved negative-going settling time.
Performance is specified over the range of reference voltages from 2 V to (VDD – 4 V) with dual supplies. This
allows a range of standard refence generators to be used such as the TL1431, with an adjustable 2.5-V bandgap
reference. Note that an output voltage range of 0 V to 10 V requires a nominal 15 V
± 5% power supply voltage.
DAC section
The TLC7225 contains four, identical, 8-bit voltage-mode DACs. Each converter has a separate reference input.
The output voltages from the converters have the same polarity as the reference voltages, thus allowing single
supply operation.
The simplified circuit diagram for channel A is shown in Figure 4. Note that AGND (terminal 6) is common to
all four DACs.
2R
R
_
+
OUTA
REFA
AGND
2R
DB0
DB5
DB6
DB7
Shown For All 1s On DAC
Figure 4. DAC Simplified-Circuit Diagram
The input impedance at any of the reference inputs is code dependent and can vary from 1.4 k
minimum to
an open circuit. The lowest input impedance at any reference input occurs when that DAC is loaded with the
digital code 01010101. Therefore, it is important that the reference source presents a low output impedance
under changing load conditions. The nodal capacitance at the reference terminals is also code dependent and
typically varies from 60 pF to 300 pF.
Each OUTx terminal can be considered as a digitally programmable voltage source with an output voltage of:
VOUTx = Dx × VREFx
where Dx is the fractional representation of the digital input code and can vary from 0 to 255/256.
The output impedance is that of the output buffer amplifier.
相關PDF資料
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TLC7225IDWR PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO24
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