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參數資料
| 型號： | TLV1549CP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP8 |
| 封裝： | ROHS COMPLIANT, PLASTIC, DIP-8 |
| 文件頁數： | 6/19頁 |
| 文件大小： | 429K |
| 代理商： | TLV1549CP |
TLV1549C, TLV1549I, TLV1549M
10-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL
SLAS071C – JANUARY 1993 – REVISED MARCH 1995
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
simplified analog input analysis
Using the equivalent circuit in Figure 14, the time required to charge the analog input capacitance from 0 to VS
within 1/2 LSB can be derived as follows:
The capacitance charging voltage is given by
(1)
where
Rt = Rs + ri
VC VS 1–e
–tc RtCi
The final voltage to 1/2 LSB is given by
(2)
VC (1/2 LSB) = VS – (VS/2048)
Equating equation 1 to equation 2 and solving for time tc gives
(3)
and
tc (1/2 LSB) = Rt × Ci × ln(2048)
(4)
VS
VS 2048
VS 1–e
–tc RtCi
Therefore, with the values given the time for the analog input signal to settle is
(5)
tc (1/2 LSB) = (Rs + 1 kΩ) × 60 pF × ln(2048)
This time must be less than the converter sample time shown in the timing diagrams.
VI = Input Voltage at ANALOG IN
VS = External Driving Source Voltage
Rs = Source Resistance
ri = Input Resistance
Ci = Equivalent Input Capacitance
Driving source requirements:
Noise and distortion for the source must be equivalent to the
resolution of the converter.
Rs must be real at the input frequency.
Rs
ri
VS
VC
50 pF MAX
1 k
Ω MAX
Driving Source
TLV1549
Ci
VI
Figure 14. Equivalent Input Circuit Including the Driving Source
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