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參數資料
| 型號： | TLV1562CDW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | 1.27 MM PITCH, SOIC-28 |
| 文件頁數： | 3/41頁 |
| 文件大小： | 600K |
| 代理商： | TLV1562CDW |
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TLV1562
2.7 V TO 5.5 V, HIGH-SPEED LOW-POWER RECONFIGURABLE ANALOG-TO-DIGITAL
CONVERTER WITH 4-INPUT, DUAL S/H, PARALLEL INTERFACE, AND POWER DOWN
SLAS162 – SEPTEMBER 1998
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
sampling/conversion
All of the sampling, conversion, and data output in the device are started by a trigger. This trigger can be the
RD or CSTART signal depending on the mode of conversion and configuration. The falling edge of the RD signal
and the rising edge of the CSTART signal are extremely important since they are used to start the conversion.
These edges need to stay as close to the falling edges of the external clock, if they are used as SYSCLK. The
minimum setup time with respect to the rising edge of the external SYSCLK should be 5 ns minimum. When
the internal SYSCLK is used, this is not an issue, since these two edges start the internal clock automatically;
therefore, the setup time is always met.
USING EXTERNAL CLOCK
S/H Hold Time
ts(TRGL-ECLKH)
Conversion Starts
Next Sampling Starts
td(ECLKL-TRGL)
Conversion Starts
Next Sampling Starts
Sampling Period
VIH
VIL
VIH
VIL
VIH
VIL
EXTERNAL
SYSCLK
RD
CSTART
Figure 8. Conversion Trigger Timing – External Clock
USING INTERNAL CLOCK
td(TRGL-ICLKH)
S/H Hold Time
Conversion Starts
Next Sampling
Starts
Conversion Starts
Next Sampling Starts
VIH
VIL
VIH
VIL
VIH
VIL
RD
CSTART
INTERNAL
SYSCLK
INTERNAL
CLOCK STARTS
Figure 9. Conversion Trigger Timing – Internal Clock
相關PDF資料 |
PDF描述 |
|---|---|
| TLV1562IDWR | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV1562CPWR | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV1562CPW | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV1562IPWR | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV1562IPW | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV1562CDWR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TLV1562CPW | 功能描述:模數轉換器 - ADC 10bit Programmable RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1562CPWG4 | 功能描述:模數轉換器 - ADC 10-Bit 2 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1562EVM | 制造商:Rochester Electronics LLC 功能描述:10- BIT A-D CONVERTER EVALUATION MODULE - Bulk 制造商:Texas Instruments 功能描述:10- BIT A-D CONVERTER EVALUATION MODULE - Bulk |
| TLV1562IDW | 功能描述:模數轉換器 - ADC 10bit Programmable RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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