- 您現在的位置：買賣IC網 > PDF目錄98249 > TLV1562IDWR (TEXAS INSTRUMENTS INC) 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 PDF資料下載
參數資料
| 型號： | TLV1562IDWR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | 1.27 MM PITCH, GREEN, SOIC-28 |
| 文件頁數： | 8/41頁 |
| 文件大小： | 600K |
| 代理商： | TLV1562IDWR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁
TLV1562
2.7 V TO 5.5 V, HIGH-SPEED LOW-POWER RECONFIGURABLE ANALOG-TO-DIGITAL
CONVERTER WITH 4-INPUT, DUAL S/H, PARALLEL INTERFACE, AND POWER DOWN
SLAS162 – SEPTEMBER 1998
16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
dual interrupt-driven mode (CR0.(3,2) = 0,1)
The dual interrupt-driven conversion mode provides a similar one-shot conversion, sampling, and conversion
but also samples both selected channels simultaneously. Conversion can only be started with the CSTART
signal. The falling edge of CSTART starts the sampling of both of the input channels selected, and the rising
edge of CSTART starts the conversion. Since it takes two consecutive conversions internally, the conversion
time required is doubled (10 SYSCLK cycles). Once the data are ready, INT falls. INT is terminated by the first
falling edge of RD, which also outputs the first data to the bus. On the rising edge of RD, data is read and the
data bus is 3-stated. The second RD falling edge outputs the second data to the bus and then reads it on the
rising edge and 3-states the bus. It is not necessary to configure the converter for each cycle or toggle CS
between cycles.
NOTE:
Dual interrupt mode is available to 10-bit or 8-bit resolution and single-ended input
type.
t EN(DATAOUT)
t dis(DATAOUT)
t 2(APDR)
t (APD)
Powerdown
(If Autopowerdown Is Set)
Powerdown
VIH
VIL
t d2(WRH–CSTARTL)
t d(INT-CSL)
t w(CSH)
t w(CSTARTL)
t s4
t conv2
t w(RDL)
t s4
t en(DATAOUT)
t d(RDL-INTZ)
t 2(APDR)
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
VIL
CS
CSTART
WR
RD
DATA
INT
Data 1A
Sample 1
Conv 1
Data 1B
Sample 2
t d2(RDH–CSTARTL)
(With Pullup)
t d2(CSTART–CONV)
t dis(DATAOUT)
Figure 13. Dual Interrupt Conversion Mode
(Conversion can only be started with CSTART for the dual interrupt mode)
相關PDF資料 |
PDF描述 |
|---|---|
| TLV1562CPWR | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV1562CPW | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV1562IPWR | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV1562IPW | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| TLV1562CPWG4 | 4-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV1562IDWRG4 | 功能描述:模數轉換器 - ADC 10-Bit 2 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1562IPW | 功能描述:模數轉換器 - ADC 10bit Programmable RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1562IPWG4 | 功能描述:模數轉換器 - ADC 10-Bit 2 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1570 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V 8-CHANNEL 10-BIT 1.25-MSPS SERIAL ANALOG-TO-DIGITAL CONVERTER |
| TLV1570CDW | 功能描述:模數轉換器 - ADC 10bit 1.25MSPS Ser RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
發布緊急采購，3分鐘左右您將得到回復。