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參數資料
| 型號： | TLV1572IDG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | GREEN, PLASTIC, SOIC-8 |
| 文件頁數： | 14/15頁 |
| 文件大小： | 348K |
| 代理商： | TLV1572IDG4 |
TLV1572
2.7 V TO 5.5 V, 10-BIT, 1.25 MSPS
SERIAL ANALOG-TO-DIGITAL CONVERTER WITH AUTO-POWERDOWN
SLAS171A – DECEMBER 1997– REVISED SEPTEMBER 1998
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
The TLV1572 is a 600-ns, 10-bit analog-to-digital converter with the throughput up to 1.25 MSPS at 5 V and
up to 625 KSPS at 3 V respectively. To run at its fastest conversion rate, it must be clocked at 20 MHz at 5 V
or 10 MHz at 3 V. The TLV1572 can be easily interfaced to microcontrollers, ASICs, DSPs, or shift registers.
Its serial interface is designed to be fully compatible with Serial Peripheral Interface (SPI) and TMS320 DSP
serial ports. It requires no hardware to interface between the TLV1572 and the microcontrollers (
Cs) with the
SPI serial port or the TMS320 DSPs. However, speed is limited by the SCLK rate of the
C or the DSP.
The TLV1572 interfaces to the DSPs over four lines: CS, SCLK, DO, and FS, and interfaces to
Cs over three
lines: CS, SCLK, and DO. The FS input must be pulled high in
C mode. The chip is in 3-state and powerdown
mode when CS is high. After CS falls, the TLV1572 checks the FS input at the CS falling edge to determine the
operation mode. If FS is low, DSP mode is set, else
C mode is set.
interfacing TLV1572 to TMS320 DSPs
The TLV1572 is compatible with Texas Instruments TMS320 DSP serial ports. Figures 3(a) and 3(b) show the
pin connections to interface the TLV1572 to the TMS320 DSPs.
CS
SCLK
FS
DO
XF
CLKX
CLKR
FSX
FSR
DR
TLV1572
TMS320
CS
SCLK
FS
DO
XF
CLKX
CLKR
FSR
DR
TLV1572
TMS320
a) DSP Serial Port Operating in Burst Mode
b) FS Externally Generated
From
System
Figure 3. TLV1570 to DSP Interface
123
4
5
6
7
16
0
LSB
SCLK
CS
FS
DO
MSB
Figure 4. Typical Timing Diagram for DSP Application
In the DSP mode, the FS input must be low when the CS goes low. There is a hold time before the FS input can
go high after the CS falling edge to ensure proper mode latching. With CS going low, DO comes out of 3-state
but the device is still in powerdown until FS (frame sync signal from DSP) goes high.
The TLV1572 checks FS at the falling edges of SCLK. Once FS is detected high, the sampling of input is started.
As soon as FS goes low, the device starts shifting the data out on the DO line. After six null bits, the A/D
conversion data becomes available on the SCLK rising edges and is latched by DSP on the falling edges.
Figure 4 shows the DSP mode timing diagram.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV1572IDR | 功能描述:模數轉換器 - ADC 10-Bit 1.25 MSPS 1-Ch DSP RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1572IDRG4 | 功能描述:模數轉換器 - ADC 10-Bit 1.25 MSPS 1-Ch DSP RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1578 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V, 1-/8-CHANNEL, 10-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTERS |
| TLV1578CDA | 功能描述:模數轉換器 - ADC 10bit 1.2 MSPS PA RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1578CDAG4 | 功能描述:模數轉換器 - ADC 8-Ch 10-Bit 1.25MSPS 8-Ch DSP/SPI RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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