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| 型號(hào)： | TLV2543CNE4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP20 |
| 封裝： | ROHS COMPLIANT, PLASTIC, DIP-20 |
| 文件頁數(shù)： | 3/28頁 |
| 文件大小： | 553K |
| 代理商： | TLV2543CNE4 |
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TLV2543C, TLV2543I
12-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 ANALOG INPUTS
SLAS096C – MARCH 1995 – REVISED JUNE 2000
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, VCC
3
3.3
3.6
V
Positive reference voltage, Vref + (see Note 2)
VCC
V
Negative reference voltage, Vref – (see Note 2)
0
V
Differential reference voltage, Vref + – Vref – (see Note 2)
2.5
VCC VCC + 0.1
V
Analog input voltage (see Note 2)
0
VCC
V
High-level control input voltage, VIH
VCC = 3 V to 3.6 V
2.1
V
Low-level control input voltage, VIL
VCC = 3 V to 3.6 V
0.6
V
Clock frequency at I/O CLOCK
0
3
4.1
MHz
Setup time, address bits at DATA INPUT before I/O CLOCK
↑, tsu(A) (see Figure 5)
100
ns
Hold time, address bits at DATA INPUT after I/O CLOCK
↑, th(A) (see Figure 5)
0
ns
Hold time, CS low after last I/O CLOCK
↓, th(CS) (see Figure 6)
0
ns
Setup time, CS low before clocking in first address bit, tsu(CS) (see Note 3 and Figure 6)
1.425
s
Pulse duration, I/O CLOCK high, twH(I/O)
190
ns
Pulse duration, I/O CLOCK low, twL(I/O)
190
ns
Transition time, I/O CLOCK, tt(I/O) (see Note 4 and Figure 7)
1
s
Transition time, DATA INPUT and CS, tt(CS)
10
s
Operating free air temperature TA
TLV2543C
0
70
°C
Operating free-air temperature, TA
TLV2543I
–40
85
°C
NOTES:
2. Analog input voltages greater than the voltage applied to REF+ convert as all ones (111111111111), while input voltages less than
the voltage applied to REF– convert as all zeros (000000000000).
3. To minimize errors caused by noise at the CS input, the internal circuitry waits for a setup time after CS
↓ before responding to control
input signals. No attempt should be made to clock in an address until the minimum CS setup time elapses.
4. This is the time required for the clock input signal to fall from VIHmin to VILmax or to rise from VILmax to VIHmin. In the vicinity of
normal room temperature, the devices function with input clock transition time as slow as 1
s for remote data acquisition applications
where the sensor and the A/D converter are placed several feet away from the controlling microprocessor.
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