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參數資料
| 型號： | TLV2548CPWLE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 文件頁數： | 13/39頁 |
| 文件大小： | 648K |
| 代理商： | TLV2548CPWLE |
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TLV2544, TLV2548
2.7 V TO 5.5 V, 12-BIT, 200 KSPS, 4/8 CHANNEL, LOW POWER,
SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN
SLAS198A –FEBRUARY 1999– REVISED AUGUST 1999
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (continued)
MIN
NOM
MAX
UNIT
Transition time, for FS, SCLK, SDI, tt(SCLK)
0.5
SCLK
Setup time, CS falling edge before SCLK rising edge (FS=1) or before SCLK falling edge (when FS is active),
tsu(CS-SCLK)
0.5
SCLK
Hold time, CS rising edge after SCLK rising edge (FS=1) or after SCLK falling edge (when FS is active),
th(SCLK-CS)
5
ns
Delay time, delay from CS falling edge to FS rising edge, td(CSL-FSH)
0.5
7
SCLKs
Delay time, delay time from 16th SCLK falling edge to CS rising edge (FS is active), td(SCLK16L-CSH)
0.5
SCLKs
Setup time, FS rising edge before SCLK falling edge, tsu(FSH-SCLKL)
0.25
0.75
SCLKs
Hold time, FS hold high after SCLK falling edge, th(FSH-SCLKL)
0.25
0.75
SCLKs
Pulse width, CS high time, twH(CS)
100
ns
SCLK cycle time, VCC = 2.7 V to 3.6V, tc(SCLK)
67
ns
SCLK cycle time, VCC = 4.5 V to 5.5V, tc(SCLK)
50
ns
Pulse width, SCLK low time, twL(SCLK)
20
30
ns
Pulse width, SCLK high time, twH(SCLK)
20
30
ns
Setup time, SDI valid before falling edge of SCLK (FS is active) or the rising edge of SCLK (FS=1),
tsu(DI-SCLK)
25
ns
Hold time, SDI hold valid after falling edge of SCLK (FS is active) or the rising edge of SCLK (FS=1),
th(DI-SCLK)
5
ns
Delay time, delay from CS falling edge to SDO valid, td(CSL-DOV)
1
25
ns
Delay time, delay from FS falling edge to SDO valid, td(FSL-DOV)
1
25
ns
Delay time, delay from SCLK rising edge (FS is active) or SCLK falling edge (FS=1) SDO valid, td(SCLK-DOV)
1
25
ns
Delay time, delay from CS rising edge to SDO 3-stated, td(CSH-DOZ)
1
25
ns
Delay time, delay from 16th SCLK falling edge (FS is active) or the 16th rising edge (FS=1) to EOC falling
edge, td(SCLK-EOCL)
1
25
ns
Delay time, delay from EOC rising edge to SDO 3-stated if CS is low, td(EOCH-DOZ)
1
50
ns
Delay time, delay from 16th SCLK rising edge to INT falling edge (FS =1) or from the 16th falling edge SCLK
to INT falling edge (when FS active), td(SCLK-INTL)
3.5
s
Delay time, delay from CS falling edge to INT rising edge, td(CSL-INTH)
1
50
ns
Delay time, delay from CS rising edge to CSTART falling edge, td(CSH-CSTARTL)
100
ns
Delay time, delay from CSTART rising edge to EOC falling edge, td(CSTARTH-EOCL)
1
50
ns
Pulse width, CSTART low time, twL(CSTART)
0.8
s
Delay time, delay from CS rising edge to EOC rising edge, td(CSH-EOCH)
1
50
ns
Delay time, delay from CSTART rising edge to CSTART falling edge, td(CSTARTH-CSTARTL)
3.6
s
Delay time, delay from CSTART rising edge to INT falling edge, td(CSTARTH-INTL)
3.5
s
Operating free air temperature TA
TLV2544C/TLV2548C
0
70
_C
Operating free-air temperature, TA
TLV2544I/TLV2548I
–40
85
_C
NOTE 2: This is the time required for the clock input signal to fall from VIH max or to rise from VILmax to VIHmin. In the vicinity of normal room
temperature, the devices function with input clock transition time as slow as 1
s for remote data-acquisition applications where the
sensor and A/D converter are placed several feet away from the controlling microprocessor.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV2548CPWR | 功能描述:模數轉換器 - ADC 12-Bit 200 kSPS Serial Out RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV2548CPWRG4 | 功能描述:模數轉換器 - ADC 12-Bit 200 kSPS Serial Out RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV2548EVM | 功能描述:EVALUATION MODULE FOR TLV2548 RoHS:是 類別:編程器，開發系統 >> 評估板 - 模數轉換器 (ADC) 系列:- 產品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數量:1 位數:12 采樣率（每秒）:94.4k 數據接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| TLV2548IDW | 功能描述:模數轉換器 - ADC 12bit 200KSPS SAR RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV2548IDWG4 | 功能描述:模數轉換器 - ADC 12bit 200KSPS SAR RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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